PIC24FJ256DA206-I/PT Microchip Technology, PIC24FJ256DA206-I/PT Datasheet - Page 211

• Manufacturer Part Number: PIC24FJ256DA206-I/PT
• Description: MCU PIC 16BIT FLASH 256K 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA206-I/PT

• Core Size: 16-Bit
• Program Memory Size: 256KB (85.5K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 52
• Ram Memory Size: 96KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, SPI, UART, USB
• Embedded Interface Type: I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

15.0
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices may be serial EEPROMs, shift
registers, display drivers, A/D Converters, etc. The SPI
module is compatible with the SPI and SIOP Motorola
interfaces. All devices of the PIC24FJ256DA210 family
include three SPI modules.
The module supports operation in two buffer modes. In
Standard mode, data is shifted through a single serial
buffer. In Enhanced Buffer mode, data is shifted
through an 8-level FIFO buffer.
 2010 Microchip Technology Inc.
Note:
Note:
SERIAL PERIPHERAL
INTERFACE (SPI)
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section 23. “Serial Peripheral Interface
(SPI)” (DS39699). The information in this
data sheet supersedes the information in
the FRM.
Do not perform read-modify-write opera-
tions (such as bit-oriented instructions) on
the SPIxBUF register in either Standard or
Enhanced Buffer mode.
Family
Reference
Manual”,
PIC24FJ256DA210 FAMILY
®
The module also supports a basic framed SPI protocol
while operating in either Master or Slave mode. A total
of four framed SPI configurations are supported.
The SPI serial interface consists of four pins:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx: Active-Low Slave Select or Frame
The SPI module can be configured to operate using 2,
3 or 4 pins. In the 3-pin mode, SSx is not used. In the
2-pin mode, both SDOx and SSx are not used.
Block diagrams of the module in Standard and
Enhanced modes are shown in Figure 15-1 and
Figure 15-2.
Synchronization I/O Pulse
Note:
In this section, the SPI modules are
referred to together as SPIx or separately
as SPI1, SPI2 or SPI3. Special Function
Registers will follow a similar notation. For
example, SPIxCON1 and SPIxCON2 refer
to the control registers for any of the 3 SPI
modules.
DS39969B-page 211