PIC24FJ256DA206-I/PT Microchip Technology, PIC24FJ256DA206-I/PT Datasheet - Page 315

MCU PIC 16BIT FLASH 256K 64TQFP

PIC24FJ256DA206-I/PT

Manufacturer Part Number
PIC24FJ256DA206-I/PT
Description
MCU PIC 16BIT FLASH 256K 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA206-I/PT

Core Size
16-Bit
Program Memory Size
256KB (85.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA206-I/PT
Manufacturer:
AMD
Quantity:
2 100
Part Number:
PIC24FJ256DA206-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 22-15: G1DPADRL: DISPLAY BUFFER START ADDRESS REGISTER LOW
REGISTER 22-16: G1DPADRH: DISPLAY BUFFER START ADDRESS REGISTER HIGH
REGISTER 22-17: G1DPW: DISPLAY BUFFER WIDTH REGISTER
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-0
DPADR23
DPADR15
DPADR7
R/W-0
DPW7
R/W-0
R/W-0
R/W-0
U-0
U-0
Unimplemented: Read as ‘0’
DPADR<23:16>: Display Buffer Start Address High bits
Display buffer start address must point to an even byte address in memory.
Unimplemented: Read as ‘0’
DPW<10:0>: Display Frame Width bits (in pixels)
DPADR<15:0>: Display Buffer Start Address Low bits
Display buffer start address must point to an even byte address in memory.
DPADR22
DPADR14
R/W-0
DPADR6
R/W-0
DPW6
R/W-0
R/W-0
U-0
U-0
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
DPADR21
W = Writable bit
‘1’ = Bit is set
R/W-0
DPADR13
R/W-0
DPW5
DPADR5
U-0
U-0
R/W-0
R/W-0
DPADR20
PIC24FJ256DA210 FAMILY
R/W-0
DPW4
R/W-0
DPADR12
DPADR4
U-0
U-0
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DPADR19
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DPADR11
R/W-0
DPW3
R/W-0
DPADR3
U-0
U-0
R/W-0
R/W-0
DPADR18
DPADR10
DPW10
DPADR2
DPW2
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
DPADR17
DPADR9
DPADR1
DPW9
DPW1
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
DS39969B-page 315
DPADR16
DPADR8
DPADR0
R/W-0
R/W-0
R/W-0
R/W-0
DPW8
R/W-0
DPW0
U-0
bit 8
bit 0
bit 8
bit 0
bit 8
bit 0

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