PIC24FJ256DA206-I/PT Microchip Technology, PIC24FJ256DA206-I/PT Datasheet - Page 300

• Manufacturer Part Number: PIC24FJ256DA206-I/PT
• Description: MCU PIC 16BIT FLASH 256K 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA206-I/PT

• Core Size: 16-Bit
• Program Memory Size: 256KB (85.5K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 52
• Ram Memory Size: 96KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, SPI, UART, USB
• Embedded Interface Type: I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ256DA210 FAMILY
REGISTER 21-1:
DS39969B-page 300
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
HC = Hardware Cleared
bit 15
bit 14
bit 13
bit 12-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R-0, HSC
CRCFUL
CRCEN
R/W-0
CRCEN: CRC Enable bit
1 = Enables module
0 = Disables module; all state machines, pointers and CRCWDAT/CRCDATH reset; other SFRs are
Unimplemented: Read as ‘0’
CSIDL: CRC Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
VWORD<4:0>: Pointer Value bits
Indicates the number of valid words in the FIFO. Has a maximum value of 8 when PLEN<4:0>  7 or
16 when PLEN<4:0>
CRCFUL: FIFO Full bit
1 = FIFO is full
0 = FIFO is not full
CRCMPT: FIFO Empty bit
1 = FIFO is empty
0 = FIFO is not empty
CRCISEL: CRC Interrupt Selection bit
1 = Interrupt on FIFO is empty; the final word of data is still shifting through the CRC
0 = Interrupt on shift is complete and results are ready
CRCGO: Start CRC bit
1 = Start CRC serial shifter
0 = CRC serial shifter is turned off
LENDIAN: Data Shift Direction Select bit
1 = Data word is shifted into the CRC, starting with the LSb (little endian)
0 = Data word is shifted into the CRC, starting with the MSb (big endian)
Unimplemented: Read as ‘0’
R-1, HSC
CRCMPT
NOT reset
U-0
—
CRCCON1: CRC CONTROL 1 REGISTER
W = Writable bit
‘1’ = Bit is set
HSC = Hardware Settable/Clearable bit
CRCISEL
CSIDL
R/W-0
R/W-0


7.
R/W-0, HC
VWORD4
R-0, HSC
CRCGO
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VWORD3
LENDIAN
R-0, HSC
R/W-0
VWORD2
R-0, HSC
U-0
—
 2010 Microchip Technology Inc.
x = Bit is unknown
VWORD1
R-0, HSC
U-0
—
VWORD0
R-0, HSC
U-0
—
bit 8
bit 0