PIC24FJ256DA206-I/PT Microchip Technology, PIC24FJ256DA206-I/PT Datasheet - Page 311

MCU PIC 16BIT FLASH 256K 64TQFP

PIC24FJ256DA206-I/PT

Manufacturer Part Number
PIC24FJ256DA206-I/PT
Description
MCU PIC 16BIT FLASH 256K 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA206-I/PT

Core Size
16-Bit
Program Memory Size
256KB (85.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ256DA206-I/PT
Manufacturer:
AMD
Quantity:
2 100
Part Number:
PIC24FJ256DA206-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 22-7:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
R/W-0
IPUIE
PUIE
PUIE: Processing Units Complete Interrupt Enable bit
1 = Enables the PU complete interrupt
0 = Disables the PU complete interrupt
Unimplemented: Read as ‘0’
IPUIE: Inflate Processing Unit Complete Interrupt Enable bit
1 = Enables the IPU complete interrupt
0 = Disables the IPU complete interrupt
RCCIE: Rectangle Copy Graphics Processing Unit Complete Interrupt bit
1 = Enables the RCCGPU complete interrupt
0 = Disables the RCCGPU complete interrupt
CHRIE: Character Graphics Processing Unit Busy Interrupt bit
1 = Enables the CHRGPU busy interrupt
0 = Disables the CHRGPU busy interrupt
VMRGNIE: Vertical Blanking Interrupt Enable bit
1 = Enables the vertical blanking period interrupt
0 = Disables the vertical blanking period interrupt
HMRGNIE: Horizontal Blanking Interrupt Enable bit
1 = Enables the horizontal blanking period interrupt
0 = Disables the horizontal blanking period interrupt
CMDLVIE: Command Watermark Interrupt Enable bit
1 = Enables the command watermark interrupt bit
0 = Disables the command watermark interrupt bit
CMDFULIE: Command FIFO Full Interrupt Enable bit
1 = Enables the command FIFO full interrupt
0 = Disables the command FIFO full interrupt
CMDMPTIE: Command FIFO Empty Interrupt Enable bit
1 = Enables the command FIFO empty interrupt
0 = Disables the command FIFO empty interrupt
RCCIE
R/W-0
U-0
G1IE: GFX INTERRUPT ENABLE REGISTER
W = Writable bit
‘1’ = Bit is set
CHRIE
R/W-0
U-0
PIC24FJ256DA210 FAMILY
VMRGNIE
R/W-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HMRGNIE
R/W-0
U-0
CMDLVIE
R/W-0
U-0
x = Bit is unknown
CMDFULIE
R/W-0
U-0
DS39969B-page 311
CMDMPTIE
R/W-0
U-0
bit 8
bit 0

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