ST72C215G2M6 STMicroelectronics, ST72C215G2M6 Datasheet - Page 24

• Manufacturer Part Number: ST72C215G2M6
• Description: IC MCU 8BIT 8K FLASH SOIC-28
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C215G2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: ST7
• No. Of I/o's: 22
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: ST72C2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDT1-DVP2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition

ST72104G, ST72215G, ST72216G, ST72254G
7.6 MAIN CLOCK CONTROLLER (MCC)
The Main Clock Controller (MCC) supplies the
clock for the ST7 CPU and its internal peripherals.
It allows SLOW power saving mode to be man-
aged by the application.
All functions are managed by the Miscellaneous
register 1 (MISCR1).
The MCC block consists of:
Figure 14. Main Clock Controller (MCC) Block Diagram
24/140
A programmable CPU clock prescaler
A clock-out signal to supply external devices
f
OSC
DIV 2
f
OSC
/2
MISCR1
-
-
MCO
ALTERNATE
FUNCTION
PORT
-
DIV 2, 4, 8, 16
The prescaler allows the selection of the main
clock frequency and is controlled by three bits of
the MISCR1: CP1, CP0 and SMS.
The clock-out capability consists of a dedicated
I/O port pin configurable as an f
drive external devices. It is controlled by the MCO
bit in the MISCR1 register.
See
TERS" on page 36
-
CP1 CP0
Section 11 "MISCELLANEOUS REGIS-
SMS
for more details.
f
CPU
CPU
CLOCK TO CAN
PERIPHERALS
TO CPU AND
PERIPHERAL
CPU CLOCK
clock output to
MCO