ST72C215G2M6 STMicroelectronics, ST72C215G2M6 Datasheet - Page 37

• Manufacturer Part Number: ST72C215G2M6
• Description: IC MCU 8BIT 8K FLASH SOIC-28
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C215G2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: ST7
• No. Of I/o's: 22
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: ST72C2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDT1-DVP2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition

MISCELLANEOUS REGISTERS (Cont’d)
11.3 MISCELLANEOUS REGISTER DESCRIPTION
MISCELLANEOUS REGISTER 1 (MISCR1)
Read /Write
Reset Value: 0000 0000 (00h)
Bit 7:6 = IS1[1:0] ei1 sensitivity
The interrupt sensitivity, defined using the IS1[1:0]
bits, is applied to the ei1 external interrupts. These
two bits can be written only when the I bit of the CC
register is set to 1 (interrupt masked).
ei1: Port B (C optional)
Bit 5 = MCO Main clock out selection
This bit enables the MCO alternate function on the
PC2 I/O port. It is set and cleared by software.
0: MCO alternate function disabled (I/O pin free for
1: MCO alternate function enabled (f
Bit 4:3 = IS0[1:0] ei0 sensitivity
The interrupt sensitivity, defined using the IS0[1:0]
bits, is applied to the ei0 external interrupts. These
two bits can be written only when the I bit of the CC
register is set to 1 (interrupt masked).
ei0: Port A (C optional)
IS11
Falling edge & low level
Rising edge only
Falling edge only
Rising and falling edge
Falling edge & low level
Rising edge only
Falling edge only
Rising and falling edge
general-purpose I/O)
port)
7
External Interrupt Sensitivity
External Interrupt Sensitivity
IS10 MCO IS01
IS00
CP1
CPU
CP0
IS11 IS10
IS01 IS00
on I/O
0
0
1
1
0
0
1
1
SMS
0
0
1
0
1
1
0
1
0
ST72104G, ST72215G, ST72216G, ST72254G
Bit 2:1 = CP[1:0] CPU clock prescaler
These bits select the CPU clock prescaler which is
applied in the different slow modes. Their action is
conditioned by the setting of the SMS bit. These
two bits are set and cleared by software
Bit 0 = SMS Slow mode select
This bit is set and cleared by software.
0: Normal mode. f
1: Slow mode. f
See low power consumption mode and MCC
chapters for more details.
f
CPU
in SLOW mode
f
f
f
f
OSC
OSC
OSC
OSC
/ 16
/ 32
/ 4
/ 8
CPU
CPU
is given by CP1, CP0
=
f
OSC
/ 2
CP1
0
1
0
1
CP0
37/140
0
0
1
1