STM32F101VDT6 STMicroelectronics, STM32F101VDT6 Datasheet - Page 76

MCU ARM 32BIT 384K FLASH 100LQFP

STM32F101VDT6

Manufacturer Part Number
STM32F101VDT6
Description
MCU ARM 32BIT 384K FLASH 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F101VDT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
36MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F101x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
48 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
STM3210E-EVAL
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
On-chip Dac
12 bit, 2 Channel
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Electrical characteristics
5.3.12
76/106
Electromagnetic Interference (EMI)
The electromagnetic field emitted by the device is monitored while a simple application is
executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with
IEC 61967-2 standard which specifies the test board and the pin loading.
Table 42.
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/C101 standard.
Table 43.
1. Based on characterization results, not tested in production.
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
These tests are compliant with EIA/JESD 78 IC latch-up standard.
Table 44.
V
V
Symbol Parameter
Symbol
Symbol
ESD(HBM)
ESD(CDM)
S
EMI
LU
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
Peak level
Electrostatic discharge
voltage (human body model)
Electrostatic discharge
voltage (charge device model)
Static latch-up class
EMI characteristics
ESD absolute maximum ratings
Electrical sensitivities
Parameter
Ratings
V
LQFP144 package
compliant with
IEC 61967-2
DD
3.3 V, T
Conditions
Doc ID 14610 Rev 7
A
T
25 °C,
A
+85 °C conforming to JESD78A
T
to JESD22-A114
T
to JESD22-C101
A
A
+25 °C, conforming
+25 °C, conforming
STM32F101xC, STM32F101xD, STM32F101xE
Conditions
0.1 MHz to 30 MHz
30 MHz to 130 MHz
130 MHz to 1 GHz
SAE EMI Level
frequency band
Monitored
Conditions
2
II
Class Maximum value
Max vs. [f
8/36 MHz
27
26
8
4
HSE
2000
500
/f
HCLK
II level A
Class
]
(1)
dBµV
Unit
Unit
-
V

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