HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 174

IC H8 MCU FLASH 128K 100QFP

HD64F3048F16

Manufacturer Part Number
HD64F3048F16
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of HD64F3048F16

Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 6 Bus Controller
Wait Modes in Areas Where Wait-State Controller is Enabled
External three-state access areas in which the wait-state controller is enabled (ASTn = 1, WCEn =
1) can operate in pin wait mode 1, pin auto-wait mode, or programmable wait mode, as selected by
bits WMS1 and WMS0. Bits WMS1 and WMS0 apply to all areas, so all areas in which the wait-
state controller is enabled operate in the same wait mode.
Pin Wait Mode 1: In all accesses to external three-state-access areas, the number of wait states
(T
clock ( ) in the last of these wait states, an additional wait state is inserted. If the WAIT pin
remains low, wait states continue to be inserted until the WAIT signal goes high.
Pin wait mode 1 is useful for inserting four or more wait states, or for inserting different numbers
of wait states for different external devices.
If the wait count is 0, this mode operates in the same way as pin wait mode 0.
Rev. 3.00 Sep 27, 2006 page 146 of 872
REJ09B0325-0300
Read
access
Write
access
Note: * Arrows indicate time of sampling of the
W
) selected by bits WC1 and WC0 are inserted. If the WAIT pin is low at the fall of the system
WAIT pin
Address bus
AS
RD
Data bus
HWR
Data bus
, LWR
T
1
Figure 6.12 Pin Wait Mode 0
T
WAIT
2
*
pin.
External address
Inserted by
Write data
T
W
*
WAIT
T
signal
W
*
Read data
T
3

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