HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 18

• Manufacturer Part Number: HD64F3048F16
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048F16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

6.3
6.4
Section 7 Refresh Controller
7.1
7.2
7.3
7.4
7.5
Section 8 DMA Controller
8.1
Rev. 3.00 Sep 27, 2006 page xvi of xxvi
6.2.3
6.2.4
6.2.5
6.2.6
Operation .......................................................................................................................... 133
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
Usage Notes ...................................................................................................................... 156
6.4.1
6.4.2
6.4.3
6.4.4
Overview........................................................................................................................... 159
7.1.1
7.1.2
7.1.3
7.1.4
Register Descriptions ........................................................................................................ 163
7.2.1
7.2.2
7.2.3
7.2.4
Operation .......................................................................................................................... 169
7.3.1
7.3.2
7.3.3
7.3.4
Interrupt Source ................................................................................................................ 196
Usage Notes ...................................................................................................................... 196
Overview........................................................................................................................... 199
8.1.1
8.1.2
Wait Control Register (WCR).............................................................................. 128
Wait State Controller Enable Register (WCER) .................................................. 129
Bus Release Control Register (BRCR) ................................................................ 130
Chip Select Control Register (CSCR).................................................................. 132
Area Division ....................................................................................................... 133
Chip Select Signals .............................................................................................. 135
Data Bus............................................................................................................... 136
Bus Control Signal Timing .................................................................................. 137
Wait Modes.......................................................................................................... 145
Interconnections with Memory (Example) .......................................................... 151
Bus Arbiter Operation.......................................................................................... 153
Connection to Dynamic RAM and Pseudo-Static RAM...................................... 156
Register Write Timing ......................................................................................... 156
BREQ Input Timing............................................................................................. 158
Transition To Software Standby Mode ................................................................ 158
Features................................................................................................................ 159
Block Diagram ..................................................................................................... 161
Input/Output Pins ................................................................................................. 162
Register Configuration......................................................................................... 162
Refresh Control Register (RFSHCR)................................................................... 163
Refresh Timer Control/Status Register (RTMCSR) ............................................ 166
Refresh Timer Counter (RTCNT)........................................................................ 168
Refresh Time Constant Register (RTCOR) ......................................................... 168
Overview.............................................................................................................. 169
DRAM Refresh Control ....................................................................................... 171
Pseudo-Static RAM Refresh Control ................................................................... 185
Interval Timer ...................................................................................................... 190
Features................................................................................................................ 199
Block Diagram ..................................................................................................... 200
................................................................................................ 199
............................................................................................ 159