IC 8051 MCU 64K FLASH 64TQFP

C8051F023R

Manufacturer Part NumberC8051F023R
DescriptionIC 8051 MCU 64K FLASH 64TQFP
ManufacturerSilicon Laboratories Inc
SeriesC8051F02x
C8051F023R datasheets
 

Specifications of C8051F023R

Core Processor8051Core Size8-Bit
Speed25MHzConnectivityEBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, Temp Sensor, WDTNumber Of I /o32
Program Memory Size64KB (64K x 8)Program Memory TypeFLASH
Ram Size4.25K x 8Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 V
Data ConvertersA/D 8x8b, 8x10b; D/A 2x12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case64-TQFP, 64-VQFP
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantEeprom Size-
Other names336-1035-2  
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Page 83/272

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8.
DACS, 12-BIT VOLTAGE MODE
Each C8051F020/1/2/3 device includes two on-chip 12-bit voltage-mode Digital-to-Analog Converters (DACs).
Each DAC has an output swing of 0V to (VREF-1LSB) for a corresponding input code range of 0x000 to 0xFFF. The
DACs may be enabled/disabled via their corresponding control registers, DAC0CN and DAC1CN. While disabled,
the DAC output is maintained in a high-impedance state, and the DAC supply current falls to 1 µA or less. The volt-
age reference for each DAC is supplied at the VREFD pin (C8051F020/2 devices) or the VREF pin (C8051F021/3
devices). Note that the VREF pin on C8051F021/3 devices may be driven by the internal voltage reference or an
external source. If the internal voltage reference is used it must be enabled in order for the DAC outputs to be valid.
See
Section “9. VOLTAGE REFERENCE (C8051F020/2)” on page 91
ENCE (C8051F021/3)” on page 93
for more information on configuring the voltage reference for the DACs.
8.1.
DAC Output Scheduling
Each DAC features a flexible output update mechanism which allows for seamless full-scale changes and supports
jitter-free updates for waveform generation. The following examples are written in terms of DAC0, but DAC1 opera-
tion is identical. Note that reads from DAC0L return pre-latch data, meaning the value read is the same as the last
value written to this register, not the value at the DAC0L latch. Reads from DAC0H always return the value at the
DAC0H latch.
Figure 8.1. DAC Functional Block Diagram
DAC0EN
DAC0MD1
DAC0MD0
DAC0DF2
DAC0DF1
DAC0DF0
8
8
DAC1EN
DAC1MD1
DAC1MD0
DAC1DF2
DAC1DF1
DAC1DF0
8
8
C8051F020/1/2/3
or
Section “10. VOLTAGE REFER-
REF
8
12
DAC0
8
REF
8
12
DAC1
8
Rev. 1.4
AV+
DAC0
AGND
AV+
DAC1
AGND
83