MC68HC11E1CFN2 Freescale Semiconductor, MC68HC11E1CFN2 Datasheet - Page 49
MC68HC11E1CFN2
Manufacturer Part Number
MC68HC11E1CFN2
Description
IC MCU 512 EEPROM 2MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet
1.MC68HC11E1CFN3.pdf
(268 pages)
Specifications of MC68HC11E1CFN2
Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
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M68HC11E Family — Rev. 5
MOTOROLA
EE[3:0] — EEPROM Mapping Bits
Resets:
U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch prior to reset,
but the function of COP is controlled by the DISR bit in TEST1 register.
Single chip:
Expanded:
Bootstrap:
EE[3:0] apply only to MC68HC811E2 and allow the 2048 bytes of EEPROM to
be remapped to any 4-Kbyte boundary. See
Address:
Figure 2-11. MC68HC811E2 System Configuration Register (CONFIG)
Read:
Write:
Test:
Freescale Semiconductor, Inc.
For More Information On This Product,
$103F
Bit 7
EE3
Operating Modes and On-Chip Memory
U
U
1
1
Go to: www.freescale.com
= Unimplemented
EE2
EE[3:0]
U
U
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
6
1
1
Table 2-3. EEPROM Mapping
EE1
U
U
5
1
1
EE0
U
U
4
1
1
EEPROM Location
Operating Modes and On-Chip Memory
$C800–$CFFF
$D800–$DFFF
$A800–$AFFF
$B800–$BFFF
$E800–$EFFF
$F800–$FFFF
$0800–$0FFF
$1800–$1FFF
$2800–$2FFF
$3800–$3FFF
$4800–$4FFF
$5800–$5FFF
$6800–$6FFF
$7800–$7FFF
$8800–$8FFF
$9800–$9FFF
Table
NOSEC
U
U
3
1
1
2-3.
NOCOP
U(L)
U(L)
U
U
2
1
1
1
1
1
Memory Map
Data Sheet
EEON
Bit 0
U
1
1
0
49
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