MC68HC908JB16DW Freescale Semiconductor, MC68HC908JB16DW Datasheet - Page 128

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MC68HC908JB16DW

Manufacturer Part Number
MC68HC908JB16DW
Description
IC MCU 16K FLASH 6MHZ USB 28SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908JB16DW

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
SCI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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Monitor ROM (MON)
Technical Data
128
Figure
the reset vector is blank and IRQ = V
required for a baud rate of 19200.
Enter monitor mode with the pin configuration shown in
pulling RST low and then high. The rising edge of RST latches monitor
mode. Once monitor mode is latched, the values on the specified pins
can change.
Once out of reset, the MCU waits for the host to send eight security
bytes. (See
break signal (10 consecutive logic zeros) to the host, indicating that it is
ready to receive a command. The break signal also provides a timing
reference to allow the host to determine the necessary baud rate.
In monitor mode, the MCU uses different vectors for reset, SWI
(software interrupt), and break interrupt than those for user mode. The
alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 9-2
and monitor mode.
Notes:
Monitor
1. If the high voltage (V
Modes
User
COP enable output. The COP is a mask option enabled or disabled by the COPD bit in the
configuration register.
9-2. shows a simplified diagram of the monitor mode entry when
Disabled
is a summary of the vector differences between user mode
Enabled
9.5
Table 9-2. Monitor Mode Vector Differences
COP
Monitor ROM (MON)
Security.) After the security bytes, the MCU sends a
(1)
TST
) is removed from the IRQ pin or the RST pin, the SIM asserts its
Vector
$FFFE
$FEFE
Reset
High
Vector
$FFFF
$FEFF
Reset
Low
Functions
DD
Vector
$FFFC
$FEFC
Break
. An external clock of 12MHz is
High
MC68HC908JB16
$FEFD
Vector
$FFFD
Break
Low
Freescale Semiconductor
Figure 9-1
Vector
$FFFC
$FEFC
High
SWI
$FEFD
Vector
$FFFD
Rev. 1.1
Low
SWI
by

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