MC68HC908JB16DW Freescale Semiconductor, MC68HC908JB16DW Datasheet - Page 52

• Manufacturer Part Number: MC68HC908JB16DW
• Description: IC MCU 16K FLASH 6MHZ USB 28SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JB16DW

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: SCI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

Memory Map
Technical Data
52
Addr.
$0050
$0051
$0052
$0053
$0054
$0055
$0056
$0057
$0058
$0059
PLL1 N & R Divider Select
PLL2 N & R Divider Select
Phase Detector Control
PLL Bandwidth Control
PLL1 N Divider Select
PLL1 R Divider Select
PLL2 N Divider Select
PLL2 R Divider Select
VCO Control Register
Register Name
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 9 of 12)
Register High
Register High
Register Low
Register Low
Register Low
Register Low
Reserved
(PNRH1)
(PNRH2)
(PNSL1)
(PRSL1)
(PNSL1)
(PRSL2)
Register
(PBWC)
Register
(PDCR)
(PVCR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
X = Indeterminate
VDS1_11 VDS1_10
VDS2_11 VDS2_10
VDS1_7
RDS1_7
VDS2_7
RDS2_7
VCO_7
PHD_7
Bit 7
R
R
0
0
0
1
0
0
1
1
VDS1_6
RDS1_6
VDS2_6
RDS2_6
LOCK1
VCO_6
PHD_6
R
6
0
0
0
1
0
0
1
0
0
Memory Map
VDS1_9
VDS1_5
RDS1_5
VDS2_9
VDS2_5
RDS2_5
VCO_5
PHD_5
R
R
5
1
1
1
0
1
1
0
0
= Unimplemented
PLLON1
VDS1_8
VDS1_4
RDS1_4
VDS2_8
VDS2_4
RDS2_4
VCO_4
PHD_4
R
4
0
1
0
1
1
0
1
1
1
VDS1_3
RDS1_3
VDS2_3
RDS2_3
VCO_3
PHD_3
R
R
3
0
0
0
1
0
0
0
1
0
0
MC68HC908JB16
VDS1_2
RDS1_2
VDS2_2
RDS2_2
LOCK2
VCO_2
PHD_2
Freescale Semiconductor
R
R
0
0
0
0
1
0
0
0
1
0
0
2
= Reserved
RDS1_9
VDS1_1
RDS1_1
RDS2_9
VDS2_1
RDS2_1
VCO_1
PHD_1
R
R
1
0
0
0
0
0
0
0
0
—
PLLON2
RDS1_8
RDS1_0
RDS2_8
RDS2_0
VDS1_0
VDS2_0
Rev. 1.1
VCO_0
PHD_0
Bit 0
R
0
0
0
1
0
0
1
0
0