DS87C550-QCL+ Maxim Integrated Products, DS87C550-QCL+ Datasheet - Page 31

IC MCU EPROM ADC/PWM HS 68-PLCC

DS87C550-QCL+

Manufacturer Part Number
DS87C550-QCL+
Description
IC MCU EPROM ADC/PWM HS 68-PLCC
Manufacturer
Maxim Integrated Products
Series
87Cr
Datasheet

Specifications of DS87C550-QCL+

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, PWM, WDT
Number Of I /o
55
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-LCC, 68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program the DS87C550 as follows:
1. Apply the address value.
2. Apply the data value.
3. Select the programming option from Table 10 using the control signals.
4. Increase the voltage on V
5. Pulse the PROG signal 5 times for EPROM array and 25 times for encryption table, lock bits, and
6. Repeat as many times as necessary.
EPROM PROGRAMMING MODES Table 10
*PLn indicates pulse to a logic low n times
EPROM LOCK BITS Table 11
SECURITY OPTIONS
The DS87C550 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64-
byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted
form.
Lock Bits
The security lock consists of 3 lock bits. These bits select a total of four levels. Higher levels provide
increasing security but also limit application flexibility. Table 11 shows the security settings. Note that
the programmer cannot directly read the state of the security lock.
Encryption Array
The Encryption Array allows an authorized user to verify EPROM without allowing the true memory to
be dumped. During a verify operation, each byte is Exclusive NORed (XNOR) with a byte in the
Encryption Array. This results in a true representation of the EPROM while the Encryption is
Program Lock Bits
Level
Program Encryption Array
Read Signature or Option
Program Option Register
Register 30, 31, 60, FCh
other EPROM bits.
1
2
3
4
Program Code Data
Verify Code Data
Address 0-3Fh
Address FCh
MODE
LB1
U
P
P
P
Lock Bits
LB2
U
U
P
P
LB1
LB2
LB3
LB3
RST
U
U
U
P
H
H
H
H
H
H
H
H
PP
from 5V to 12.75V if writing to the EPROM.
Protection
No program lock. Encrypted; verify if Encryption table was programmed.
Prevent MOVC instructions in external memory from reading program bytes in
internal memory. EA is sampled and latched on reset. Allow no further programming
of EPROM.
Level 2 plus no verify operation. Also, prevents MOVX instructions in external
memory from reading SRAM (MOVX) in internal memory.
Level 3 plus no external execution.
PSEN
L
L
L
L
L
L
L
L
PL25*
PL25*
PL25*
PL25*
PL25*
ALE/
PROG
PL5*
H
H
31 of 49
12.75 V
12.75 V
12.75 V
12.75 V
12.75 V
12.75 V
EA/
V
H
H
PP
P2.6
H
H
H
L
L
L
L
L
P2.7
H
H
H
H
H
L
L
L
P3.3
H
H
H
H
H
H
L
L
P3.6
H
H
H
H
L
L
L
L
P3.7
H
H
H
H
L
L
L
L

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