CYWUSB6934-28SEC Cypress Semiconductor Corp, CYWUSB6934-28SEC Datasheet - Page 13

IC WIRELESS USB 2.4GHZ 28-SOIC

CYWUSB6934-28SEC

Manufacturer Part Number
CYWUSB6934-28SEC
Description
IC WIRELESS USB 2.4GHZ 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CYWUSB6934-28SEC

Frequency
2.4GHz
Data Rate - Maximum
62.5kbps
Modulation Or Protocol
DSSS, GFSK
Applications
HID, PC, Peripheral Gaming Devices
Power - Output
0dBm
Sensitivity
-90dBm
Voltage - Supply
2.7 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Not Compliant
Other names
428-1580-5

Available stocks

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Part Number
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Part Number:
CYWUSB6934-28SEC
Manufacturer:
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Quantity:
22 751
Document 38-16007 Rev. *G
Bit
7:0
Bit
7:0
Bit
7:0
Bit
7:0
Name
Valid
Name
Data
Name
Valid
Name
Data
7
7
7
7
Addr: 0x0A
Addr: 0x0B
Addr: 0x0C
Addr: 0x09
Description
These bits indicate which of the bits in the Receive SERDES Data B register (Reg 0x0B) are valid. A “1” indicates that the
corresponding data bit is valid for Channel B.
If the Valid Data bit is set in the Receive Interrupt Status register (0x08) all eight bits in the Receive SERDES Data B register
(Reg 0x0B) are valid. Therefore, it is not necessary to read the Receive SERDES Valid B register (Reg 0x0C). This register is
read-only.
Description
Received Data for Channel A. The over-the-air received order is bit 0 followed by bit 1, followed by bit 2, followed by bit 3,
followed by bit 4, followed by bit 5, followed by bit 6, followed by bit 7. This register is read-only.
Description
These bits indicate which of the bits in the Receive SERDES Data A register (Reg 0x09) are valid. A “1” indicates that the
corresponding data bit is valid for Channel A.
If the Valid Data bit is set in the Receive Interrupt Status register (Reg 0x08) all eight bits in the Receive SERDES Data A register
(Reg 0x0A) are valid. Therefore, it is not necessary to read the Receive SERDES Valid A register (Reg 0x0C). This register is
read-only.
Description
Received Data for Channel B. The over-the-air received order is bit 0 followed by bit 1, followed by bit 2, followed by bit 3,
followed by bit 4, followed by bit 5, followed by bit 6, followed by bit 7. This register is read-only.
6
6
6
6
5
5
5
5
Figure 7-11. Receive SERDES Valid B
Figure 7-10. Receive SERDES Data B
Figure 7-9. Receive SERDES Valid A
Figure 7-8. Receive SERDES Data A
REG_RX_VALID_A
REG_RX_VALID_B
REG_RX_DATA_A
REG_RX_DATA_B
4
4
4
4
Data
Valid
Data
Valid
3
3
3
3
2
2
2
2
1
1
1
1
CYWUSB6932
CYWUSB6934
Default: 0x00
Default: 0x00
Default: 0x00
Default: 0x00
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