IC WIRELESS USB 2.4GHZ 28-SOIC

CYWUSB6934-28SEC

Manufacturer Part NumberCYWUSB6934-28SEC
DescriptionIC WIRELESS USB 2.4GHZ 28-SOIC
ManufacturerCypress Semiconductor Corp
CYWUSB6934-28SEC datasheets
 


Specifications of CYWUSB6934-28SEC

Frequency2.4GHzData Rate - Maximum62.5kbps
Modulation Or ProtocolDSSS, GFSKApplicationsHID, PC, Peripheral Gaming Devices
Power - Output0dBmSensitivity-90dBm
Voltage - Supply2.7 V ~ 3.6 VData InterfacePCB, Surface Mount
Antenna ConnectorPCB, Surface MountOperating Temperature0°C ~ 70°C
Package / Case28-SOICOperating Temperature (min)0C
Operating Temperature (max)70COperating Temperature ClassificationCommercial
Operating Supply Voltage (min)2.7VOperating Supply Voltage (typ)3V
Operating Supply Voltage (max)3.6VLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Memory Size-Current - Transmitting-
Current - Receiving-Other names428-1580-5
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Addr: 0x09
7
6
Bit
Name
Description
Received Data for Channel A. The over-the-air received order is bit 0 followed by bit 1, followed by bit 2, followed by bit 3,
7:0
Data
followed by bit 4, followed by bit 5, followed by bit 6, followed by bit 7. This register is read-only.
Addr: 0x0A
7
6
Bit
Name
Description
These bits indicate which of the bits in the Receive SERDES Data A register (Reg 0x09) are valid. A “1” indicates that the
7:0
Valid
corresponding data bit is valid for Channel A.
If the Valid Data bit is set in the Receive Interrupt Status register (Reg 0x08) all eight bits in the Receive SERDES Data A register
(Reg 0x0A) are valid. Therefore, it is not necessary to read the Receive SERDES Valid A register (Reg 0x0C). This register is
read-only.
Addr: 0x0B
7
6
Bit
Name
Description
Received Data for Channel B. The over-the-air received order is bit 0 followed by bit 1, followed by bit 2, followed by bit 3,
7:0
Data
followed by bit 4, followed by bit 5, followed by bit 6, followed by bit 7. This register is read-only.
Addr: 0x0C
7
6
Bit
Name
Description
These bits indicate which of the bits in the Receive SERDES Data B register (Reg 0x0B) are valid. A “1” indicates that the
7:0
Valid
corresponding data bit is valid for Channel B.
If the Valid Data bit is set in the Receive Interrupt Status register (0x08) all eight bits in the Receive SERDES Data B register
(Reg 0x0B) are valid. Therefore, it is not necessary to read the Receive SERDES Valid B register (Reg 0x0C). This register is
read-only.
Document 38-16007 Rev. *G
REG_RX_DATA_A
5
4
3
Data
Figure 7-8. Receive SERDES Data A
REG_RX_VALID_A
5
4
3
Valid
Figure 7-9. Receive SERDES Valid A
REG_RX_DATA_B
5
4
3
Data
Figure 7-10. Receive SERDES Data B
Figure 7-11. Receive SERDES Valid B
REG_RX_VALID_B
5
4
3
Valid
CYWUSB6932
CYWUSB6934
Default: 0x00
2
1
0
Default: 0x00
2
1
0
Default: 0x00
2
1
0
Default: 0x00
2
1
0
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