CYWUSB6934-28SEC Cypress Semiconductor Corp, CYWUSB6934-28SEC Datasheet - Page 14

IC WIRELESS USB 2.4GHZ 28-SOIC

CYWUSB6934-28SEC

Manufacturer Part Number
CYWUSB6934-28SEC
Description
IC WIRELESS USB 2.4GHZ 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CYWUSB6934-28SEC

Frequency
2.4GHz
Data Rate - Maximum
62.5kbps
Modulation Or Protocol
DSSS, GFSK
Applications
HID, PC, Peripheral Gaming Devices
Power - Output
0dBm
Sensitivity
-90dBm
Voltage - Supply
2.7 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Not Compliant
Other names
428-1580-5

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Part Number:
CYWUSB6934-28SEC
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22 751
Document 38-16007 Rev. *G
Bit
7:4
3
2
1
0
Addr: 0x0D
Name
Reserved
Underflow
Overflow
Done
Empty
7
Description
These bits are reserved and should be written with zeroes.
The Underflow bit is used to enable the interrupt associated with an underflow condition associated with the Transmit
SERDES Data register (Reg 0x0F)
An underflow condition occurs when attempting to transmit while the Transmit SERDES Data register (Reg 0x0F) does not
have any data.
The Overflow bit is used to enabled the interrupt associated with an overflow condition with the Transmit SERDES Data
register (0x0F).
An overflow condition occurs when attempting to write new data to the Transmit SERDES Data register (Reg 0x0F) before
the preceding data has been transferred to the transmit shift register.
The Done bit is used to enable the interrupt that signals the end of the transmission of data.
The Done condition occurs when the Transmit SERDES Data register (Reg 0x0F) has transmitted all of its data and there
is no more data for it to transmit.
The Empty bit is used to enable the interrupt that signals when the Transmit SERDES register (Reg 0x0F) is empty.
The Empty condition occurs when the Transmit SERDES Data register (Reg 0x0F) is loaded into the transmit buffer and
it's safe to load the next byte
1 = Underflow interrupt enabled.
0 = Underflow interrupt disabled.
1 = Overflow interrupt enabled.
0 = Overflow interrupt disabled.
1 = Done interrupt enabled.
0 = Done interrupt disabled.
1 = Empty interrupt enabled.
0 = Empty interrupt disabled.
6
Reserved
Figure 7-12. Transmit SERDES Interrupt Enable
5
REG_TX_INT_EN
4
Underflow
3
Overflow
2
Done
1
CYWUSB6932
CYWUSB6934
Default: 0x00
Page 14 of 30
Empty
0

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