CYWUSB6934-28SEC Cypress Semiconductor Corp, CYWUSB6934-28SEC Datasheet - Page 28

IC WIRELESS USB 2.4GHZ 28-SOIC

CYWUSB6934-28SEC

Manufacturer Part Number
CYWUSB6934-28SEC
Description
IC WIRELESS USB 2.4GHZ 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CYWUSB6934-28SEC

Frequency
2.4GHz
Data Rate - Maximum
62.5kbps
Modulation Or Protocol
DSSS, GFSK
Applications
HID, PC, Peripheral Gaming Devices
Power - Output
0dBm
Sensitivity
-90dBm
Voltage - Supply
2.7 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Not Compliant
Other names
428-1580-5

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CYWUSB6934-28SEC
Manufacturer:
CY
Quantity:
22 751
12.2
Table 12-4. Power Management Timing
Notes:
Document 38-16007 Rev. *G
22. The PD pin must be asserted at power up to ensure proper crystal startup.
23. When X13OUT is enabled.
24. Both the polarity and the drive method of the IRQ pin are programmable. See page 9 for more details. Figure 12-6 illustrates default values for the Configuration
25. A wakeup event is triggered when the PD pin is deasserted. Figure 12-6 illustrates a wakeup event configured to trigger an IRQ pin event via the Wake Enable
26. Measured with CTS ATXN6077A crystal.
t
t
t
t
t
t
t
t
t
t
t
Parameter
PDN_X13
SPI_RDY
PWR_RST
RST
PWR_PD
WAKE
PD
SLEEP
WAKE_INT
STABLE
STABLE2
X 1 3 O U T
R E S E T
X13OUT
register (Reg 0x05, bits 1:0).
register (Reg 0x1C, bit 0=1).
V C C
P D
Power Management Timing
IRQ
PD
Time from PD deassert to X13OUT
Time from oscillator stable to start of SPI transactions
Power On to RESET deasserted
Minimum RESET asserted pulse width
Power On to PD deasserted
PD deassert to clocks running
Minimum PD asserted pulse width
PD assert to low power mode
PD deassert to IRQ
PD deassert to clock stable
IRQ assert (wake interrupt) to clock stable
t
t
P W R _ R S T
P W R _ P D
t
SLEEP
[24]
t
t
P D N _ X 1 3
Description
PD
assert (wake interrupt)
Figure 12-5. Power On Reset/Reset Timing
(The values below are dependent upon oscillator network component selection)
[22]
[23]
Figure 12-6. Sleep / Wake Timing
t
S P I_ R D Y
t
t
WAKE
WAKE_INT
[25]
to within ±10 ppm
to within ±10 ppm
Conditions
V
cc
@ 2.7V
t
STABLE
t
STABLE2
1300
1300
Min.
10
1
1
t
R S T
CYWUSB6932
CYWUSB6934
2000
2000
2000
2100
2100
Typ
50
[26]
Max.
Page 28 of 30
Unit
µs
µs
µs
µs
µs
µs
µs
ns
µs
µs
us

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