MCIMX253CVM4 Freescale Semiconductor, MCIMX253CVM4 Datasheet - Page 109

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MCIMX253CVM4

Manufacturer Part Number
MCIMX253CVM4
Description
IC MPU I.MX25 IND 400MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX25r
Datasheets

Specifications of MCIMX253CVM4

Core Processor
ARM9
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
External Program Memory
Ram Size
144K x 8
Voltage - Supply (vcc/vdd)
1.15 V ~ 1.52 V
Data Converters
A/D 3x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
400-LFBGA
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX253CVM4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Note:
Freescale Semiconductor
• All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
• All timings are on pads when SSI is being used for data transfer.
• ”Tx” and “Rx” refer, respectively, to the transmit and receive sections of the SSI.
• For internal frame sync operation using external clock, the FS timing is the same as that of Tx data (for example, during AC97
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables figures.
mode of operation).
SS22
SS23
SS24
SS25
SS26
SS27
SS29
SS31
SS33
SS37
SS38
SS39
SS44
SS45
SS46
ID
(Tx/Rx) CK clock period
(Tx/Rx) CK clock high period
(Tx/Rx) CK clock rise time
(Tx/Rx) CK clock low period
(Tx/Rx) CK clock fall time
FS (bl) low/ high setup before (Tx) CK falling
FS (bl) low/ high setup before (Tx) CK falling
FS (wl) low/ high setup before (Tx) CK falling
FS (wl) low/ high setup before (Tx) CK falling
(Tx) CK high to STXD valid from high impedance
(Tx) CK high to STXD high/low
(Tx) CK high to STXD high impedance
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
SRXD rise/fall time
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Table 83. SSI Transmitter Timing with External Clock
Parameter
Synchronous External Clock Operation
External Clock Operation
–10.0
–10.0
Min.
81.4
36.0
36.0
10.0
10.0
10.0
2.0
Max.
15.0
15.0
15.0
15.0
15.0
6.0
6.0
6.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
109

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