MCIMX253CVM4 Freescale Semiconductor, MCIMX253CVM4 Datasheet - Page 44

• Manufacturer Part Number: MCIMX253CVM4
• Description: IC MPU I.MX25 IND 400MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX25r

Specifications of MCIMX253CVM4

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 400MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: External Program Memory
• Ram Size: 144K x 8
• Voltage - Supply (vcc/vdd): 1.15 V ~ 1.52 V
• Data Converters: A/D 3x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 400-LFBGA
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

3.7.2
Table 35
implementation of the ATA interface on silicon, the bus buffer used, the cable delay and cable skew.
44
OW7
OW8
OW9
tskew1
Name
ID
ti_ds
ti_dh
tsui
tco
tsu
thi
T
shows parameters used to specify the ATA timing. These parameters depend on the
Write 1 / read low time
Transmission time slot
Release time
ATA Timing Parameters
1-Wire bus
(OWIRE_LINE)
Bus clock period
Set-up time ata_data to ata_iordy edge (UDMA-in only)
UDMA0
UDMA1
UDMA2,UDMA3
UDMA4
UDMA5
Hold time ata_iordy edge to ata_data (UDMA-in only)
UDMA0,UDMA1,UDMA2,UDMA3,UDMA4
UDMA5
Propagation delay bus clock L-to-H to
ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0, ata_dior, ata_diow, ata_dmack,
ata_data, ata_buffer_en
Set-up time ata_data to bus clock L-to-H
Set-up time ata_iordy to bus clock H-to-L
Hold time ata_iordy to bus clock H-to-L
Maximum difference in propagation delay bus clock L-to-H to any of the
following signals
ata_cs0, ata_cs1, ata_da2, ata_da1, ata_da0, ata_dior, ata_diow,
ata_dmack, ata_data (write), ata_buffer_en
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 8
Parameter
Figure 10. Read Sequence Timing Diagram
Table 34. WR1 /RD Timing Parameters
OW7
Table 35. Timing Parameters
Description
OW9
t
Symbol
RELEASE
t
t
LOW1
SLOT
OW8
Min.
60
15
1
Typ.
117
—
5
Value/Contributing Factor
Peripheral clock frequency
Freescale Semiconductor
Max.
120
15
45
12.0 ns
5.0 ns
4.6 ns
8.5 ns
8.5 ns
2.5 ns
15 ns
10 ns
7 ns
5 ns
4 ns
7 ns
Units
μs
μs
μs