NAU8812EVB Nuvoton Technology Corporation of America, NAU8812EVB Datasheet - Page 24

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NAU8812EVB

Manufacturer Part Number
NAU8812EVB
Description
BOARD EVAL FOR NAU8812
Manufacturer
Nuvoton Technology Corporation of America
Series
emPowerAudio™r
Datasheet

Specifications of NAU8812EVB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The ADC digital filter block performs a 24-bit signal processing. The block consists of an oversampled analog sigma-
delta modulator, digital decimator, digital filter, high pass filter, and a notch filter. The oversampled analog sigma-
delta modulator provides a bit stream to the decimation stages and filter. The ADC coding scheme is in twos-
complement format and the full-scale input level is proportional to VDDA. With a 3.3V supply voltage, the full-scale
level is 1.0V
enabled by setting ADCEN[0] address (0x02) bit. Polarity and oversampling rate of the ADC output signal can be
changed by ADCPL[0] address (0x0E) and ADCOS[3] address (0x0E) respectively.
emPowerAudio
Datasheet Revision 2.0
SMPLR[3:1]
ADCOS[3]
12.3.
HPFEN[8]
HPFAM[7]
ADCEN[0]
ADCPL[0]
HPF[6:4]
Bit(s)
ADC
ADC DIGITAL FILTER BLOCK
RMS
Decimator
and any voltage greater than full scale may overload the ADC and cause distortion. The ADC is
Digital
0x0E
0x0E
0x0E
0x0E
0x0E
0x02
0x07
Addr
ADC Polarity
ADC Over Sample
Rate
High Pass Filter
Enable
Audio or Application Mode
High Pass Filter frequencies
Enable ADC
Sample rate
Figure 9: ADC Digital Filter Path Block Diagram
Digital
Filter
Table 9: Register associated with ADC
ADC Digital Filters
Parameter
Page 24 of 109
Gain
/
0 = Normal
1 = Inverted
0=64x (Lowest power)
1=128x (best SNR at typical condition)
0 = Disable
1 = Enable
0 = Audio (1
1 = Application (2
82 Hz to 612 Hz dependant on the sample rate
0 = Disable
1 = Enable
8k Hz to 48 kHz
Pass
Filter
High
st
Programmable Range
order, fc ~ 3.7 kHz)
nd
Notch
Filter
order, fc =HPF)
NAU8812
January 2011
Interface
Digital
Audio

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