NAU8812EVB Nuvoton Technology Corporation of America, NAU8812EVB Datasheet - Page 65

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NAU8812EVB

Manufacturer Part Number
NAU8812EVB
Description
BOARD EVAL FOR NAU8812
Manufacturer
Nuvoton Technology Corporation of America
Series
emPowerAudio™r
Datasheet

Specifications of NAU8812EVB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Name
Bit
0
1
The following table explains the PCM control register bits.
There are three different CODEC modes to choose from as follows:
emPowerAudio
Datasheet Revision 2.0
0x03
Addr
0x04
0x02
Addr
Addr
13.3. AUDIO CONTROL REGISTERS
Name
BCLKP[8]
Inverted
Bit
Polarity
Normal
0
1
BCLK
13.2.2. Power Management 2
13.2.3. Power Management 3
13.3.1. Audio Interface Control
BCLKP
D8
0
D8
D8
0
MOUTEN[7]
Disable
Enable
Enable
MOUT
MOUTEN NSPKEN PSPKEN
Frame Clock
D7
FSP
Inverted
D7
Polarity
D7
FSP[7]
Normal
0
Name
Bit
NSPKEN[6]
0
1
SPKOUT-
Disable
Enable
Enable
D6
D6
D6
0
WLEN[1:0]
DAC data appear in „left‟ phase of
FRAME
DAC data appears in „right‟ phase of
FRAME
Stage Disable
Stage Enable
Input Boost
BSTEN[4]
Enable
D5
phases of FRAME clock
DAC Data „right‟ or „left‟
D5
D5
PSPKEN[5]
0
Page 65 of 109
SPKOUT+
Disable
Enable
Enable
DACPHS[2]
D4
BSTEN
0
PGA Enable
PGAEN[2]
D4
D4
MIC(+/-)
AIFMT[1:0]
Disable
Enable
MOUTMXEN SPKMXEN
MOUTMXEN[3]
MONO Mixer
Disable
D3
Enable
Enable
D3
D3
0
ADC Enable
ADCEN[0]
DACPHS ADCPHS
PGAEN
Disable
Enable
D2
D2
ADC data appear in „left‟ phase of
FRAME
ADC data appears in „right‟ phase of
FRAME
D2
Speaker Mixer
SPKMXEN[2]
Disable
Enable
Enable
phases of FRAME clock
ADC Data „right‟ or „left‟
D1
D1
0
D1
0
ADCPHS[1]
NAU8812
January 2011
ADCEN
DACEN
DACEN[0]
D0
D0
Disable
0
Enable
Enable
D0
DAC
Default
Default
Default
0x000
0x050
0x000

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