NAU8812EVB Nuvoton Technology Corporation of America, NAU8812EVB Datasheet - Page 27
NAU8812EVB
Manufacturer Part Number
NAU8812EVB
Description
BOARD EVAL FOR NAU8812
Manufacturer
Nuvoton Technology Corporation of America
Series
emPowerAudio™r
Datasheet
1.NAU8812EVB.pdf
(109 pages)
Specifications of NAU8812EVB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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The ALC is enabled by setting ALCEN[8] address (0x20) bit to HIGH. The ALC has two functional modes, which is
set by ALCM[8] address (0x22).
When the ALC is disabled, the input PGA remains at the last controlled value of the ALC. An input gain update must
be made by writing to the PGAGAIN[5:0] address (0x2D). A digital peak detector monitors the input signal amplitude
and compares it to a register defined threshold level ALCSL[3:0] address (0x21).
The registers listed in the following section allow configuration of ALC operation with respect to:
emPowerAudio
Datasheet Revision 2.0
Normal mode (ALCM = LOW)
Peak Limiter mode (ALCM = HIGH)
ALC target level
Gain increment and decrement rates
Minimum and maximum PGA gain values for ALC operating range
Hold time before gain increments in response to input signal
-39dB
™
gate threshold
Input < noise
Input
Pin
-39dB
ALC operation range
Target ALCSL -6dB
PGA
Figure 11: ALC Response Graph
Input Level
Figure 10: ALC Block Diagram
-6dB +6dB
ADC
Page 27 of 109
Gain (Attenuation) Clipped
at ALCMNGAIN -12dB
Filter
Rate Convert/ Decimator
Sinc
Decimator
Digital
ALC
+33 dB
-12 dB
0 dB
PGA Gain
Digital
Filter
ALCNEN = 1
ALCNTH = -39dB
MIC Boost Gain = 0dB
ALCSL = -6dB
ALCMNGAIN = -12dB
ALCMXGAIN = +35.25dB
NAU8812
January 2011
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