NAU8812EVB Nuvoton Technology Corporation of America, NAU8812EVB Datasheet - Page 84

• Manufacturer Part Number: NAU8812EVB
• Description: BOARD EVAL FOR NAU8812
• Manufacturer: Nuvoton Technology Corporation of America
• Series: emPowerAudio™r

Specifications of NAU8812EVB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Name
Transmit and receive timeslot are expressed in number of BCLK cycles in a 10-bit word. The most significant bit
TSLOT[9] is located in register PCMTS2[0] address (0x3C). Timeslot, TSLOT[9:0], determines the start point for the
timeslot on the PCM interface for data in the transmit direction.
If TRI = 1 and PUDOEN = 0, the device will drive the LSB bit 1
after LSB BCLK Rising edge) but if TRI = 0 or PUDOEN = 1 this feature is disabled, full BCLK of LSB will be driven
the LSB value.
emPowerAudio
Datasheet Revision 2.0
Bit
0x3C
Addr
0x3B
0
1
Addr
13.10.
13.10.1. PCM1 TIMESLOT CONTROL REGISTER
13.10.2. PCM2 TIMESLOT CONTROL REGISTER
PCMTSEN
PCM Time Slot
PCMTSEN[8]
PCM Transit
D8
PCM TIME SLOT CONTROL & ADCOUT IMPEDANCE OPTION CONTROL
D8
™
PCM A
Enable
D7
TRI
D7
Drive the full Clock
of LSB
Tri-State the 2
half of LSB
Tri-state PCMT
PCM8BIT PUDOEN PUDPE
iADCOUT
D6
Figure 41: The Programmable ADCOUT Pin
D6
TRI[7]
PUDPE
PUDPS
PUDOE
LSB
nd
D5
Page 84 of 109
D5
Use WLEN[6:5] to
select Word Length
Audio interface will
be 8 Bit Word
Length
TSLOT[8:0]
PCM Word Length
PCM8BIT[6]
D4
D4
st
half of BCLK out of the ADCOUT pin (stop driving
PUDPS
D3
D3
LOUTR
ADCOUT
Left and Right
Channel have
D2
D2
same data
LOUTR
Disable
Enable
PCMB
D1
D1
NAU8812
January 2011
TSLOT[9] 0x000
D0
D0
PCM Mode2
Disable
Enable
PCMB
Default
Default
0x000