YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 174

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 5 Interrupt Controller
5.3.1
INTCR selects the interrupt control mode, and the detected edge for NMI.
Bit
7, 6
5
4
3
2 to
0
5.3.2
IPR are eleven 16-bit readable/writable registers that set priorities (levels 7 to 0) for interrupts
other than NMI.
The correspondence between interrupt sources and IPR settings is shown in table 5.2 (Interrupt
Sources, Vector Addresses, and Interrupt Priorities). Setting a value in the range from H'0 to H'7
in the 3-bit groups of bits 14 to 12, 10 to 8, 6 to 4, and 2 to 0 sets the priority of the corresponding
interrupt. IPR should be read in word size.
Rev.7.00 Mar. 18, 2009 page 106 of 1136
REJ09B0109-0700
Bit Name
INTM1
INTM0
NMIEG
Interrupt Control Register (INTCR)
Interrupt Priority Registers A to K (IPRA to IPRK)
Initial Value
All 0
0
0
0
All 0
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0 and the initial value
should not be changed.
Interrupt Control Select Mode 1 and 0
These bits select either of two interrupt control modes
for the interrupt controller.
00: Interrupt control mode 0
01: Setting prohibited.
10: Interrupt control mode 2
11: Setting prohibited.
NMI Edge Select
Selects the input edge for the NMI pin.
0: Interrupt request generated at falling edge of NMI
1: Interrupt request generated at rising edge of NMI
Reserved
These bits are always read as 0 and the initial value
should not be changed.
input
input
Interrupts are controlled by I bit.
Interrupts are controlled by bits I2 to I0, and IPR.

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