YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 825

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.7.8
When the GM bit in SMR is set to 1, the clock output level can be fixed with bits CKE1 and
CKE0 in SCR. At this time, the minimum clock pulse width can be made the specified width.
Figure 15.31 shows the timing for fixing the clock output level. In this example, GM is set to 1,
CKE1 is cleared to 0, and the CKE0 bit is controlled.
CKE0
SCK
Clock Output Control
Figure 15.30 Example of Reception Processing Flow
Figure 15.31 Timing for Fixing Clock Output Level
No
No
Specified pulse width
RDRF flag in SSR to 0
Read RDR and clear
All data received?
Clear RE bit to 0
ORER = 0 and
Start reception
Initialization
RDRF = 1?
PER = 0
Start
Yes
Yes
Yes
Section 15 Serial Communication Interface (SCI, IrDA)
No
Rev.7.00 Mar. 18, 2009 page 757 of 1136
Specified pulse width
Error processing
REJ09B0109-0700

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