YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 283

KIT DEV EVAL H8S/2378 LCD

YLCDRSK2378

Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet

Specifications of YLCDRSK2378

Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
When DDS = 0 or EDDS = 0: When DRAM space is accessed in DMAC or EXDMAC single
address transfer mode, full access (normal access) is always performed. With the DRAM interface,
the DACK or EDACK output goes low from the T
In modes other than DMAC or EXDMAC single address transfer mode, burst access can be used
when accessing DRAM space.
Figure 6.42 shows the DACK or EDACK output timing for the DRAM interface when DDS = 0 or
EDDS = 0.
Read
Write
Note: n = 2 to 5
Figure 6.42 Example of DACK/EDACK Output Timing when DDS = 0 or EDDS = 0
DACK or EDACK
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
T
p
Row address
(RAST = 0, CAST = 1)
High
High
T
r
r
state.
Rev.7.00 Mar. 18, 2009 page 215 of 1136
T
c1
Column address
Section 6 Bus Controller (BSC)
T
c2
REJ09B0109-0700
T
c3

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