AD962711-105EBZ Analog Devices Inc, AD962711-105EBZ Datasheet - Page 13

• Manufacturer Part Number: AD962711-105EBZ
• Description: EVAL For 11bit 105 Dual 1.8V
• Manufacturer: Analog Devices Inc

Specifications of AD962711-105EBZ

• Number Of Adc's: 2
• Number Of Bits: 11
• Sampling Rate (per Second): 105M
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: 1 ~ 2 Vpp
• Power (typ) @ Conditions: 600mW @ 105MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD962711
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions (Parallel CMOS Mode)
Pin No.
ADC Power Supplies
20, 64
1, 21
24, 57
36, 45, 46
0
12 to 14, 58 to 60
ADC Analog
37
38
44
43
39
40
42
41
49
50
ADC Fast Detect Outputs
29
30
31
32
53
54
55
56
Digital Input
52
Mnemonic
DRGND
DRVDD
DVDD
AVDD
AGND
DNC
VIN+A
VIN−A
VIN+B
VIN−B
VREF
SENSE
RBIAS
CML
CLK+
CLK−
FD0A
FD1A
FD2A
FD3A
FD0B
FD1B
FD2B
FD3B
SYNC
DNC = DO NOT CONNECT
D10B (MSB)
D0A (LSB)
Type
Ground
Supply
Supply
Supply
Ground
Input
Input
Input
Input
Input/Output
Input
Input/Output
Output
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Input
DRVDD
DCOB
DCOA
DNC
DNC
DNC
D3B
D4B
D5B
D6B
D7B
D8B
D9B
D1A
Figure 6. LFCSP Parallel CMOS Pin Configuration (Top View)
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Description
Digital Output Ground.
Digital Output Driver Supply (1.8 V to 3.3 V).
Digital Power Supply (1.8 V Nominal).
Analog Power Supply (1.8 V Nominal).
Analog Ground. Pin 0 is the exposed thermal pad on the bottom of the package.
Do Not Connect.
Differential Analog Input Pin (+) for Channel A.
Differential Analog Input Pin (−) for Channel A.
Differential Analog Input Pin (+) for Channel B.
Differential Analog Input Pin (−) for Channel B.
Voltage Reference Input/Output.
Voltage Reference Mode Select. See Table 11 for details.
External Reference Bias Resistor.
Common-Mode Level Bias Output for Analog Inputs.
ADC Clock Input—True.
ADC Clock Input—Complement.
Channel A Fast Detect Indicator. See Table 14 for details.
Channel A Fast Detect Indicator. See Table 14 for details.
Channel A Fast Detect Indicator. See Table 14 for details.
Channel A Fast Detect Indicator. See Table 14 for details.
Channel B Fast Detect Indicator. See Table 14 for details.
Channel B Fast Detect Indicator. See Table 14 for details.
Channel B Fast Detect Indicator. See Table 14 for details.
Channel B Fast Detect Indicator. See Table 14 for details.
Digital Synchronization Pin. Slave mode only.
PIN 1
INDICATOR
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
Rev. A | Page 13 of 72
PARALLEL CMOS
AD9627-11
(Not to Scale)
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SCLK/DFS
SDIO/DCS
AVDD
AVDD
VIN+B
VIN–B
RBIAS
CML
SENSE
VREF
VIN–A
VIN+A
AVDD
SMI SDFS
SMI SCLK/PDWN
SMI SDO/OEB
AD9627-11