ADSP-21160MKBZ-80 Analog Devices Inc, ADSP-21160MKBZ-80 Datasheet - Page 12

• Manufacturer Part Number: ADSP-21160MKBZ-80
• Description: 32bit SHARC W/SIMD Capability
• Manufacturer: Analog Devices Inc
• Series: SHARC®r
• Type: Floating Pointr

Specifications of ADSP-21160MKBZ-80

• Interface: Host Interface, Link Port, Serial Port
• Clock Rate: 80MHz
• Non-volatile Memory: External
• On-chip Ram: 512kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Device Core Size: 32b
• Architecture: Enhanced Harvard
• Format: Floating Point
• Clock Freq (max): 80MHz
• Mips: 80
• Device Input Clock Speed: 80MHz
• Ram Size: 512KB
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (min): 2.37/3.13V
• Operating Supply Voltage (max): 2.63/3.47V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 400
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADSP-21160M
Table 2. Pin Function Descriptions (Continued)
Table 3. Boot Mode Selection
Pin
TCK
TMS
TDI
TDO
TRST
EMU
CIF
V
V
AV
AGND
GND
NC
EBOOT
1
0
0
0
0
1
DDINT
DDEXT
DD
LBOOT
0
0
1
0
1
1
Type
I
I/S
I/S
O
I/A
O (O/D)
O/T
P
P
P
G
G
BMS
Output
1 (Input)
1 (Input)
0 (Input)
0 (Input)
x (Input)
Function
Test Clock (JTAG). Provides a clock for JTAG boundary scan.
Test Mode Select (JTAG). Used to control the test state machine. TMS has a 20 k
internal pull-up resistor.
Test Data Input (JTAG). Provides serial data for the boundary scan logic. TDI has a
20 k internal pull-up resistor.
Test Data Output (JTAG). Serial scan output of the boundary scan path.
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low)
after power-up or held low for proper operation of the ADSP-21160M. TRST has a
20 k internal pull-up resistor.
Emulation Status. Must be connected to the ADSP-21160M emulator target board
connector only. EMU has a 50 k internal pull-up resistor.
Core Instruction Fetch. Signal is active low when an external instruction fetch is
performed. Driven by bus master only. Three-state when host is bus master.
Core Power Supply. Nominally 2.5 V dc and supplies the DSP’s core processor
(40 pins).
I/O Power Supply. Nominally 3.3 V dc (46 pins).
Analog Power Supply. Nominally 2.5 V dc and supplies the DSP’s internal PLL (clock
generator). This pin has the same specifications as V
circuitry is required.
Analog Power Supply Return.
Power Supply Return. (83 pins)
Do Not Connect. Reserved pins that must be left open and unconnected (5 pins).
Booting Mode
EPROM (Connect BMS to EPROM chip select.)
Host Processor
Link Port
No Booting. Processor executes from external memory.
Reserved
Reserved
For more information, see Power Supplies on page 6.
–12–
DDINT
, except that added filtering
REV. 0