ADSP-21160MKBZ-80 Analog Devices Inc, ADSP-21160MKBZ-80 Datasheet - Page 37

32bit SHARC W/SIMD Capability

ADSP-21160MKBZ-80

Manufacturer Part Number
ADSP-21160MKBZ-80
Description
32bit SHARC W/SIMD Capability
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr

Specifications of ADSP-21160MKBZ-80

Interface
Host Interface, Link Port, Serial Port
Clock Rate
80MHz
Non-volatile Memory
External
On-chip Ram
512kB
Voltage - I/o
3.30V
Voltage - Core
2.50V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
400-BGA
Device Core Size
32b
Architecture
Enhanced Harvard
Format
Floating Point
Clock Freq (max)
80MHz
Mips
80
Device Input Clock Speed
80MHz
Ram Size
512KB
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (min)
2.37/3.13V
Operating Supply Voltage (max)
2.63/3.47V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
400
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21160MKBZ-80
Manufacturer:
AD
Quantity:
310
Part Number:
ADSP-21160MKBZ-80
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Serial Ports
To determine whether communication is possible between
two devices at clock speed n, the following specifications
must be confirmed: 1) frame sync delay and frame sync
setup and hold, 2) data delay and data setup and hold, and
3) SCLK width.
Table 21. Serial Ports—External Clock
1
2
Table 22. Serial Ports—Internal Clock
1
2
Table 23. Serial Ports—External or Internal Clock
1
Table 24. Serial Ports—External Clock
1
Table 25. Serial Ports—Internal Clock
REV. 0
Referenced to sample edge.
RFS hold after RCK when MCE = 1, MFD = 0 is 0 ns minimum from drive edge. TFS hold after TCK for late external TFS is 0 ns minimum from drive edge.
Referenced to sample edge.
RFS hold after RCK when MCE = 1, MFD = 0 is 0 ns minimum from drive edge. TFS hold after TCK for late external TFS is 0 ns minimum from drive edge.
Referenced to drive edge.
Referenced to drive edge.
Parameter
Timing Requirements:
t
t
t
t
t
t
Parameter
Timing Requirements:
t
t
t
t
Parameter
Switching Characteristics:
t
t
Parameter
Switching Characteristics:
t
t
t
t
Parameter
Switching Characteristics:
t
t
SFSE
HFSE
SDRE
HDRE
SCLKW
SCLK
SFSI
HFSI
SDRI
HDRI
DFSE
HOFSE
DFSE
HOFSE
DDTE
HDTE
DFSI
HOFSI
TFS/RFS Setup Before TCLK/RCLK
TFS/RFS Hold After TCLK/RCLK
Receive Data Setup Before RCLK
Receive Data Hold After RCLK
TCLK/RCLK Width
TCLK/RCLK Period
TFS Setup Before TCLK
TFS/RFS Hold After TCLK/RCLK
Receive Data Setup Before RCLK
Receive Data Hold After RCLK
RFS Delay After RCLK (Internally Generated RFS)
RFS Hold After RCLK (Internally Generated RFS)
TFS Delay After TCLK (Internally Generated TFS)
TFS Hold After TCLK (Internally Generated TFS)
Transmit Data Delay After TCLK
Transmit Data Hold After TCLK
TFS Delay After TCLK (Internally Generated TFS)
TFS Hold After TCLK (Internally Generated TFS)
1
; RFS Setup Before RCLK
1
1
1
1
1
1
1,2
1,2
1
–37–
1
1
1
1
1
1
1
Min
3.5
4
1.5
4
14
2t
Min
8
1
6.5
3
Min
3
Min
3
0
Min
–1.5
CCLK
Max
Max
Max
13
Max
13
16
Max
4.5
ADSP-21160M
Unit
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
Unit
ns
ns
Unit
ns
ns
ns
ns
Unit
ns
ns

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