WM8990ECS/RV Wolfson Microelectronics, WM8990ECS/RV Datasheet - Page 136

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WM8990ECS/RV

Manufacturer Part Number
WM8990ECS/RV
Description
Audio CODECs Stereo CODEC w.Class AB/D speaker driver
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8990ECS/RV

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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WM8990
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EXAMPLE CONTROL SEQUENCES
Pop-suppression control sequences are described below for typical WM8990 operations involving
start-up, muting and disabling of signal paths. Note that these descriptions are intended for guidance
only. Application software should be verified and tailored to ensure optimum performance.
Start-up sequence
The following sequence describes the register settings required to enable the headphone outputs
LOUT and ROUT. It assumes that VMID and VREF are initially disabled and actively discharged to
AGND.
Table 87 Example Start-Up Control Sequence
Output Mute sequence
The following sequence describes the register settings required to mute and disable the headphone
outputs LOUT and ROUT. It assumes that the soft start bias voltage is initially disabled.
Table 88 Example Mute Control Sequence
Output Un-Mute sequence
The following sequence describes the register settings required to enable and un-mute the
headphone outputs LOUT and ROUT.
Table 89 Example Un-Mute Control Sequence
1
2
3
4
5
6
7
8
9
1
2
1
2
STEP
STEP
STEP
Discharge output drivers.
Time delay for output
capacitors to discharge.
Enable soft start control and
start-up bias source. Select
start-up bias.
Disable active discharging of
VMID and Output drivers.
Enable Output drivers.
Enable VMID and VREF.
Time delay for soft-start to
execute
Select default bias source.
Disable soft start control and
soft start voltage.
Enable buffered VMID at all
input and output circuits.
Disable output drivers
Enable Output drivers.
Disable buffered VMID at all
input and output circuits.
DESCRIPTION
DESCRIPTION
DESCRIPTION
DIS_LOUT = 1
DIS_ROUT = 1
SOFTST = 1
BUFDCOPEN = 1
POBCTRL = 1
VMIDTOG = 0
DIS_LOUT = 0
DIS_ROUT = 0
LOUT_ENA = 1
ROUT_ENA = 1
VMID_MODE = 01
VREF_ENA = 1
POBCTRL = 0
SOFTST = 0
BUFDCOPEN = 0
BUFIOEN = 1
LOUT_ENA = 0
ROUT_ENA = 0
LOUT_ENA = 1
ROUT_ENA = 1
BUFIOEN = 0
REGISTER SETTING
REGISTER SETTING
REGISTER SETTING
PD, March 2009, Rev 4.0
Production Data
136

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