WM8990ECS/RV Wolfson Microelectronics, WM8990ECS/RV Datasheet - Page 62

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WM8990ECS/RV

Manufacturer Part Number
WM8990ECS/RV
Description
Audio CODECs Stereo CODEC w.Class AB/D speaker driver
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8990ECS/RV

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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WM8990
w
DIGITAL TO ANALOGUE CONVERTER (DAC)
The WM8990 DACs receive digital input data from the DACDAT pin and via the digital sidetone path.
The digital audio data is converted to oversampled bit streams in the on-chip, true 24-bit digital
interpolation filters. The bitstream data enters two multi-bit, sigma-delta DACs, which convert them to
high quality analogue audio signals. The multi-bit DAC architecture reduces high frequency noise and
sensitivity to clock jitter. It also uses a Dynamic Element Matching technique for high linearity and
low distortion.
The analogue outputs from the DACs can then be mixed with other analogue inputs using the output
mixers LOMIX, ROMIX and the speaker output mixer SPKMIX.
The DACs are enabled by the DACL_ENA and DACR_ENA register bits.
Table 24 DAC Enable Control
DAC DIGITAL VOLUME CONTROL
The output level of each DAC can be controlled digitally over a range from -71.625dB to 0dB in
0.375dB steps. The level of attenuation for an eight-bit code X is given by:
0.375 × (X-192) dB for 1 ≤ X ≤ 192;
The DAC_VU bit controls the loading of digital volume control data. When DAC_VU is set to 0, the
DACL_VOL or DACR_VOL control data will be loaded into the respective control register, but will not
actually change the digital gain setting. Both left and right gain settings are updated when a 1 is
written to DAC_VU. This makes it possible to update the gain of both channels simultaneously.
Table 25 DAC Digital Volume Control
R3 (03h)
R11 (0Bh)
R12 (0Ch)
REGISTER
ADDRESS
REGISTER
ADDRESS
8
7:0
8
7:0
BIT
1
0
BIT
DAC_VU
DACL_VOL
[7:0]
DAC_VU
DACR_VOL
[7:0]
LABEL
DACL_ENA
(rw)
DACR_ENA
(rw)
LABEL
MUTE for X = 0
N/A
1100_0000b
(0dB)
N/A
1100_0000b
(0dB)
DEFAULT
0b
0b
DEFAULT
0 = DAC disabled
1 = DAC enabled
Right DAC Enable
0 = DAC disabled
1 = DAC enabled
0dB for 192 ≤ X ≤ 255
DAC Volume Update
Writing a 1 to this bit will cause left
and right DAC volume to be updated
simultaneously
Left DAC Digital Volume
(See Table 26 for volume range)
DAC Volume Update
Writing a 1 to this bit will cause left
and right DAC volume to be updated
simultaneously
Right DAC Digital Volume
(See Table 26 for volume range)
Left DAC Enable
DESCRIPTION
DESCRIPTION
PD, March 2009, Rev 4.0
Production Data
62

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