WM8990ECS/RV Wolfson Microelectronics, WM8990ECS/RV Datasheet - Page 84

• Manufacturer Part Number: WM8990ECS/RV
• Description: Audio CODECs Stereo CODEC w.Class AB/D speaker driver
• Manufacturer: Wolfson Microelectronics

Specifications of WM8990ECS/RV

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8990
w
GPIO CONTROL REGISTERS
Table 45 shows how the dual-function GPIO pins are configured to operate in their different modes.
Note that the order of precedence described earlier applies.
Register field AIF_SEL selects the function of GPIO3, GPIO4 and GPIO5 between Audio Interface 2
and GPIO functions. Register field ALRCGPIO1 enables the GPIO functionality on GPIO1. Register
bit AIF_TRIS, when set, takes precedence over AIF_SEL and GPIO1 and tri-states all GPIO pins.
Table 45 GPIO and GPI Pin Function Select
The GPIO pins are also controlled by the register fields described in Table 46. Note the order of
precedence described earlier applies.
Pull-up and pull-down resistors may be enabled on any of GPIO1 or GPIO3 to GPIO5. If enabled,
these settings take precedence over all other GPIO selections for that pin. Note that, by default, the
pull-down resistors on GPIO3, GPIO4 and GPIO5 are enabled.
When the GPIO pins are used as inputs, de-bounce and interrupt masking may be controlled on all
GPIO pins (including GPI7 and GPI8) using GPIOn_DEB_ENA and GPIOn_IRQ_ENA bits as shown
in Table 47.
For each of GPIO1 and GPIO3 to GPIO5, the register field GPIOn_SEL is used to select the pin
functions of the individual GPIO pins as shown in Table 47. Note that this control has the lowest
precedence and is only effective when GPIOn_PU, GPIOn_PD, AIF_TRIS, AIFSEL and ALRCGPIO1
are set to allow GPIO functionality on that GPIO pin.
R8 (08h)
R9 (09h)
REGISTER
ADDRESS
BIT
13
15
13
AIF_SEL
ALRCGPIO1
AIF_TRIS
LABEL
DEFAULT
0b
0b
0b
Audio Interface Select
0 = Audio interface 1
1 = Audio interface 2 (GPIO3/BCLK2,
GPIO4/DACLRC2, GPIO5/DACDAT2)
ADCLRC/GPIO1 Pin Function Select
0 = ADCLRC
1 = GPIO1 (ADCLRC connected to
DACLRC internally)
Audio Interface and GPIO Tristate
0 = Audio interface and GPIO pins
operate normally
1 = Tristate all audio interface and GPIO
pins
DESCRIPTION
PD, March 2009, Rev 4.0
Production Data
84