WM8903LGEFK/RV Wolfson Microelectronics, WM8903LGEFK/RV Datasheet - Page 109

• Manufacturer Part Number: WM8903LGEFK/RV
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/RV

• Audio Codec Type: Stereo Codec
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 6
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Sampling Rate: 96kHz
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Adcs / Dacs Signal To Noise Ratio: 96dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pre-Production
POWER-ON RESET
Figure 62 Typical Power up Sequence where AVDD is Powered before DCVDD
w
Figure 61 Internal Power on Reset Circuit Schematic
The WM8903 includes an internal Power-On-Reset Circuit, as shown in Figure 61, which is used to
reset the digital logic into a default state after power up. The POR circuit is powered from AVDD and
monitors DCVDD. It asserts PORB low if AVDD or DCVDD is below a minimum threshold.
POWER-UP TIMING - AVDD POWERED BEFORE DCVDD
Figure 62 shows the power-up sequence where AVDD is powered up before DCVDD. When AVDD
goes above the minimum threshold, V
is asserted low and the chip is held in reset. In this condition, all writes to the control interface are
ignored.
Once AVDD is at full supply level, and DCVDD rises to V
registers are in their default state and writes to the control interface may now take place.
On power down, where AVDD falls first, PORB is asserted low whenever AVDD drops below the
minimum threshold V
pora_off
.
pora
, there is enough voltage for the circuit to guarantee PORB
pord_on
the internal PORB is set high, all
PP, Rev 3.1, August 2009
WM8903
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