CS42518-CQZR Cirrus Logic Inc, CS42518-CQZR Datasheet - Page 70

• Manufacturer Part Number: CS42518-CQZR
• Description: Audio CODECs IC 110dB 192kHz 8Ch Mlt-Ch CODEC
• Manufacturer: Cirrus Logic Inc

Specifications of CS42518-CQZR

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 8
• Conversion Rate: 192 KSPs
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC, 8 DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

70
6.28.2 POLARITY SELECT (POLARITY)
6.28.3 FUNCTIONAL CONTROL (FUNCTIONX)
RXPx/GPOx
RXP7/GPO7
RXP6/GPO6
RXP5/GPO5
RXP4/GPO4
RXP3/GPO3
RXP2/GPO2
RXP1/GPO1
pin 42
pin 43
pin 44
pin 45
pin 46
pin 47
pin 48
or as a dedicated ADC overflow pin indicating an over-range condition anywhere in the ADC signal
path for either the left or right channel. The Functionx bits determine the operation of the pin. When
configured as a GPO with the output driven low, the driver is a CMOS driver. When configured to iden-
tify an ADC Overflow condition, the driver is an open drain driver requiring a pull-up resistor.
GPO, Drive High Mode - The pin is configured as a general purpose output driven high.
Default = 0
Function:
RXP Input - If the pin is configured for an RXP input, the polarity bit is ignored. It is recommended that
in this mode this bit be set to 0.
Mute Mode - If the pin is configured as a dedicated mute output pin, the polarity bit determines the
polarity of the mapped pin according to the following
0 - Active low
1 - Active high
GPO, Drive Low / ADC Overflow Mode - If the pin is configured as a GPO, Drive Low / ADC Overflow
Mode pin, the polarity bit is ignored. It is recommended that in this mode this bit be set to 0.
GPO, Drive High - If the pin is configured as a general-purpose output driven high, the polarity bit is
ignored. It is recommended that in this mode this bit be set to 0.
Default = 00000
Function:
RXP Input - If the pin is configured for an RXP input, the functional bits are ignored. It is recommended
that in this mode all the functional bits be set to 0.
Mute Mode - If the pin is configured as a dedicated mute pin, the functional bits determine which chan-
nel mutes will be mapped to this pin according to the following table.
0 - Channel mute is not mapped to the RXPx/GPOx pin
1 - Channel mute is mapped to the RXPx/GPOx pin:
GPO, Drive Low / ADC Overflow Mode - If the pin is configured as a GPO, Drive Low / ADC Overflow
Mode pin, the Function1 and Function0 bits determine how the output will behave according to the
Reg Address
2Ch
2Dh
29h
2Ah
2Bh
2Eh
2Fh
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTB1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
M_AOUTA1
Function4
M_AOUTB1
M_AOUTB2
M_AOUTB2
M_AOUTB2
M_AOUTB2
M_AOUTA2
M_AOUTA2
M_AOUTA2
M_AOUTA2
M_AOUTA2
M_AOUTA2
Function3
M_AOUTA2
M_AOUTB2
M_AOUTB2
M_AOUTB2
M_AOUTA3
M_AOUTA3
M_AOUTA3
M_AOUTB3
M_AOUTA3
M_AOUTB3
Function2
M_AOUTB3
M_AOUTB3
M_AOUTB3
M_AOUTB3
M_AOUTB3
M_AOUTA3
M_AOUTA3
M_AOUTA3
M_AOUTA4
M_AOUTA4
Function1
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTB4
M_AOUTA4
M_AOUTA4
M_AOUTA4
M_AOUTA4
M_AOUTA4
Function0
CS42518
DS584F1