RFD16N05LSM9A Fairchild Semiconductor, RFD16N05LSM9A Datasheet

MOSFET N-CH 50V 16A TO-252AA

RFD16N05LSM9A

Manufacturer Part Number
RFD16N05LSM9A
Description
MOSFET N-CH 50V 16A TO-252AA
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of RFD16N05LSM9A

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
47 mOhm @ 16A, 5V
Drain To Source Voltage (vdss)
50V
Current - Continuous Drain (id) @ 25° C
16A
Vgs(th) (max) @ Id
2V @ 250mA
Gate Charge (qg) @ Vgs
80nC @ 10V
Power - Max
60W
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.047 Ohms
Drain-source Breakdown Voltage
50 V
Gate-source Breakdown Voltage
+/- 10 V
Continuous Drain Current
16 A
Power Dissipation
60 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
RFD16N05LSM9ATR

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Part Number
Manufacturer
Quantity
Price
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©2003 Fairchild Semiconductor Corporation
16A, 50V, 0.047 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-Channel logic level power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI
integrated circuits gives optimum utilization of silicon,
resulting in outstanding performance. They were designed
for use with logic level (5V) driving sources in applications
such as programmable controllers, automotive switching,
switching regulators, switching converters, motor relay
drivers and emitter switches for bipolar transistors. This
performance is accomplished through a special gate oxide
design which provides full rated conductance at gate biases
in the 3V to 5V range, thereby facilitating true on-off power
control directly from logic circuit supply voltages.
Formerly developmental type TA09871.
Ordering Information
NOTE: When ordering, include the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e. RFD16N05LSM9A
Packaging
RFD16N05L
RFD16N05LSM
PART NUMBER
DRAIN (FLANGE)
JEDEC TO-251AA
TO-251AA
TO-252AA
PACKAGE
Data Sheet
SOURCE
DRAIN
RFD16N05L
RFD16N05LSM
GATE
BRAND
Features
• 16A, 50V
• r
• UIS SOA Rating Curve (Single Pulse)
• Design Optimized for 5V Gate Drives
• Can be Driven Directly from CMOS, NMOS, TTL Circuits
• Compatible with Automotive Drive Requirements
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
Symbol
- TB334 “Guidelines for Soldering Surface Mount
DS(ON)
Components to PC Boards”
RFD16N05L, RFD16N05LSM
December 2003
= 0.047
SOURCE
GATE
JEDEC TO-252AA
G
DRAIN (FLANGE)
D
S
RFD16N05L, RFD16N05LSM Rev. B1

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RFD16N05LSM9A Summary of contents

Page 1

... PART NUMBER PACKAGE RFD16N05L TO-251AA RFD16N05LSM TO-252AA NOTE: When ordering, include the entire part number. Add the suffix 9A to obtain the TO-252AA variant in tape and reel, i.e. RFD16N05LSM9A Packaging JEDEC TO-251AA DRAIN (FLANGE) ©2003 Fairchild Semiconductor Corporation RFD16N05L, RFD16N05LSM December 2003 Features • ...

Page 2

... Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage Diode Reverse Recovery Time NOTES: 2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. ©2003 Fairchild Semiconductor Corporation Unless Otherwise Specified Unless Otherwise Specified SYMBOL ...

Page 3

... FIGURE 3. FORWARD BIAS SAFE OPERATING AREA 10V PULSE DURATION = DUTY CYCLE = 0.5% MAX 1.5 3 DRAIN TO SOURCE VOLTAGE (V) DS FIGURE 5. SATURATION CHARACTERISTICS ©2003 Fairchild Semiconductor Corporation Unless Otherwise Specified 100 125 150 o C) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs Idm FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING SOA ...

Page 4

... ISS 800 RSS C OSS 400 DRAIN TO SOURCE VOLTAGE (V) DS, FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE ©2003 Fairchild Semiconductor Corporation Unless Otherwise Specified (Continued FIGURE 8. NORMALIZED DRAIN TO SOURCE ON 100 150 200 o C) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN 1MHz 37.5 C ISS + C GS ...

Page 5

... REQUIRED PEAK FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. SWITCHING TIME TEST CIRCUIT CURRENT REGULATOR 12V 0.2 F 50k BATTERY 0 G(REF CURRENT G SAMPLING RESISTOR FIGURE 17. GATE CHARGE TEST CIRCUIT ©2003 Fairchild Semiconductor Corporation DUT 0. DUT V GS 10% 0 FIGURE 16. RESISTIVE SWITCHING WAVEFORMS V DS (ISOLATED ...

Page 6

... S2AMOD VSWITCH(RON=1e-5 ROFF=0.1 VON=-0.65 VOFF=4.35) .MODEL S2BMOD VSWITCH(RON=1e-5 ROFF=0.1 VON=4.35 VOFF=-0.65) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. ©2003 Fairchild Semiconductor Corporation DPLCAP 10 RSCL2 - ...

Page 7

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FRFET™ CROSSVOLT™ ...

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