PSB21384HV1.3 Infineon Technologies, PSB21384HV1.3 Datasheet - Page 100

• Manufacturer Part Number: PSB21384HV1.3
• Description: Telecom ICs AMuLaw/Speech CODEC w/ ST Transceiver
• Manufacturer: Infineon Technologies

Specifications of PSB21384HV1.3

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data Sheet
2.3.8
If MODE1.CFS is set to ’0’, the clocks are also provided in power down state.
If CFS is set to ’1’ only the analog level detector is active in power down state. All clocks,
including the IOM interface, are stopped (DD, DU are ’high’, whereas DCL is ’low’ and
BCL is ’high’).
If TR_CONF0.LDD is set to ’0’ an activation initiated from the exchange side will have
the consequence that the clock signals are provided automatically. If TR_CONF0.LDD
is set to ’1’ the microcontroller has to take care of an interrupt caused by the level detect
circuit (ISTATR.LD, see chapter 7.2.8).
From the terminal side an activation must be started by setting and resetting the SPU-
bit in the IOM_CR register and issuing the command TIM or by resetting MODE1.CFS=0.
2.3.9
The layer-1 part of the SCOUT can be enabled/disabled by configuration with the two
bits TR_CONF0.DIS_TR and TR_CONF2.DIS_TX (see chapter 7.2.3).
By default all layer-1 functions with the exception of the transmit buffers is enabled
(DIS_TR = ’0’, DIS_TX = ’1’). With several terminals connected to the S/T interface,
another terminal may keep the interface activated although the SCOUT does not
establish a connection. The receiver will monitor for incoming calls in this configuration.
If the transceiver is disabled (DIS_TR = ’1’) all layer-1 functions are disabled including
the level detection circuit of the receiver. In this case the power consumption of the layer-
1 is reduced to a minimum. All other functional blocks of the SCOUT can still operate via
IOM-2. The DCL and FSC pins become input.
Level Detection and Power Down
Transceiver Enable/Disable
90
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12