PSB21384HV1.3 Infineon Technologies, PSB21384HV1.3 Datasheet - Page 191

• Manufacturer Part Number: PSB21384HV1.3
• Description: Telecom ICs AMuLaw/Speech CODEC w/ ST Transceiver
• Manufacturer: Infineon Technologies

Specifications of PSB21384HV1.3

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.1
7.1.1
RFIFO
A read access to any address within the range 00h-1Fh gives access to the “current”
FIFO location selected by an internal pointer which is automatically incremented after
each read access. This allows for the use of efficient “move string” type commands by
the microcontroller.
The RFIFO contains up to 32 bytes of received data.
After an ISTAH.RPF interrupt, a complete data block is available. The block size can be
4, 8, 16, 32 bytes depending on the EXMR.RFBS setting.
After an ISTAH.RME interrupt, the number of received bytes can be obtained by reading
the RBCL register.
7.1.2
XFIFO
A write access to any address within the range 00-1F
location selected by an internal pointer which is automatically incremented after each
write access. This allows the use of efficient “move string” type commands by the
microcontroller.
Depending on EXMR.XFBS up to 16 or 32 bytes of transmit data can be written to the
XFIFO following an ISTAH.XPR interrupt.
Data Sheet
7
7
HDLC Control and C/I Registers
RFIFO - Receive FIFO
XFIFO - Transmit FIFO
Transmit data
Receive data
181
H
gives access to the “current” FIFO
Detailed Register Description
0
0
PSB 21381/2
PSB 21383/4
WR (00
RD (00
2001-03-12
H
H
-1F
-1F
H
H
)
)