PSB21384HV1.3 Infineon Technologies, PSB21384HV1.3 Datasheet - Page 179

• Manufacturer Part Number: PSB21384HV1.3
• Description: Telecom ICs AMuLaw/Speech CODEC w/ ST Transceiver
• Manufacturer: Infineon Technologies

Specifications of PSB21384HV1.3

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5
Figure 89 shows the clock system of the SCOUT. The oscillator is used to generate a
7.68 MHz clock signal. The DPLL generates the IOM-2 clocks FSC (8 kHz), DCL (1536
kHz) and BCL (768 kHz) synchronous to the received S/T frames (see figure 90).
The prescaler for the microcontroller clock output (MCLK) divides the 7.68 MHz clock by
1, 2 and 8 corresponding to the MCLK control bits in the MODE1 register. Additionally it
is possible to disable the MCLK output by setting the MCLK bits to ’11’.
Figure 89
Clock System of the SCOUT
Data Sheet
7.68 MHz
Clock Generation
XTAL
OSC
7.68 MHz
MODE1.MCLK
C/I change
EAW
Watchdog
'00':
'01':
'10':
'11':
DPLL
Reset Generation
MCLK Prescaler
169
2
8
1
MCLK disabled
CPLL
3
FSC
DCL
BCL
Codec
Clock
125 µs < t < 250 µs
125 µs < t < 250 µs
t = 125 µs
MCLK
clock_gen_s.vsd
Clock Generation
PSB 21381/2
PSB 21383/4
2001-03-12