ML2021CP Fairchild Semiconductor, ML2021CP Datasheet - Page 10

• Manufacturer Part Number: ML2021CP
• Description: Telecom Voice Conditioning ICs Phone Line Equalizer Group Delay Tuned
• Manufacturer: Fairchild Semiconductor

Specifications of ML2021CP

• Mounting Style: Through Hole
• Package / Case: DIP-16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ML2021
Powerdown Mode
A powerdown mode can be selected with pin P
P
consumption is reduced by removing power from the analog
section and forcing the analog output, V
impedance state. While the device is in power down mode,
the digital section is still functional and the current data word
remains stored in the latch. The master clock, CLK, can
be left active or removed during powerdown mode. When
P
Applications
10
DN
DN
= 1, the device is powered down. In this state, the power
= 0, the device is in normal operation.
µP
V
Figure 9. Controlling Multiple ML2021 and ML2004 With
ML2021 OR ML2004
IN
Only 3 Digital Lines Using One Long Data Word
µP
OUT
V
, to a high
OUT
Figure 8. Typical Serial Interface
DN
V
LOG GAIN/ATTEN
IN
. When
ML2004
V
OUT
V
ML2021 OR ML2004
IN
Power Supplies
The digital section inside the device is powered between
V
between V
AGND as the reference point.
GND and AGND are totally isolated inside the device to
minimize coupling from the digital section into the analog
section. Typically this is less than 100 µV. However, ANGD
and GND should be tied together physically near the device
and close to the common power supply ground connection.
The power supply rejection of V
output is greater than –60dB at 1 kHz, typically. If decou-
pling of the power supplies is still necessary in a system,
V
CC
CC
V
IN
and GND, or 5 volts. The analog section is powered
and V
EQUALIZER
V
OUT
ML2021
CC
SS
and V
should be decoupled with respect to AGND.
V
OUT
SS
, or ±5 volts. The analog section uses
V
ML2021 OR ML2004
IN
CC
PRODUCT SPECIFICATION
V
and V
OUT
REV. 1.1.1 3/19/01
SS
to the analog