PSMN035-150B,118 NXP Semiconductors, PSMN035-150B,118 Datasheet - Page 2

MOSFET N-CH 150V 50A SOT404

PSMN035-150B,118

Manufacturer Part Number
PSMN035-150B,118
Description
MOSFET N-CH 150V 50A SOT404
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PSMN035-150B,118

Package / Case
D²Pak, TO-263 (2 leads + tab)
Mounting Type
Surface Mount
Power - Max
250W
Fet Type
MOSFET N-Channel, Metal Oxide
Gate Charge (qg) @ Vgs
79nC @ 10V
Vgs(th) (max) @ Id
4V @ 1mA
Current - Continuous Drain (id) @ 25° C
50A
Drain To Source Voltage (vdss)
150V
Fet Feature
Standard
Rds On (max) @ Id, Vgs
35 mOhm @ 25A, 10V
Minimum Operating Temperature
- 55 C
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.035 Ohm @ 10 V
Drain-source Breakdown Voltage
150 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
50 A
Power Dissipation
250000 mW
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
934055717118::PSMN035-150B /T3::PSMN035-150B /T3
NXP Semiconductors
2. Pinning information
Table 2.
[1]
3. Ordering information
Table 3.
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PSMN035-150B_4
Product data sheet
Pin
1
2
3
mb
Type number
PSMN035-150B
Symbol
V
V
V
I
I
P
T
T
Source-drain diode
I
I
Avalanche ruggedness
E
I
D
DM
S
SM
AS
stg
j
DS
DGR
GS
tot
DS(AL)S
It is not possible to make connection to pin 2.
Symbol
G
D
S
D
Pinning information
Ordering information
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive
drain-source avalanche
energy
non-repetitive
avalanche current
Package
Name
D2PAK
Description
gate
drain
source
mounting base; connected to
drain
Description
plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
Conditions
T
T
T
T
t
T
T
t
V
unclamped; t
V
R
p
p
j
j
mb
mb
mb
mb
GS
sup
GS
≤ 10 µs; pulsed; T
≤ 10 µs; pulsed; T
≥ 25 °C; T
≤ 175 °C; T
= 100 °C; see
= 25 °C; see
= 25 °C; see
= 25 °C
= 10 V; T
= 50 Ω; unclamped; see
≤ 50 V; V
Rev. 04 — 17 November 2009
j
p
≤ 175 °C
j
j(init)
GS
= 0.1 ms; R
≥ 25 °C; R
= 10 V; T
Figure 1
Figure 3
[1]
= 25 °C; I
Figure 1
mb
mb
N-channel TrenchMOS SiliconMAX standard level FET
= 25 °C; see
= 25 °C
Simplified outline
GS
GS
j(init)
and
D
and
= 20 kΩ
= 50 Ω; see
= 47 A; V
Figure 4
SOT404 (D2PAK)
= 25 °C;
2
2
1
Figure 2
mb
2
sup
3
Figure 4
≤ 50 V;
PSMN035-150B
Graphic symbol
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
-
G
mbb076
© NXP B.V. 2009. All rights reserved.
Max
150
150
20
36
50
200
250
175
175
50
200
460
50
D
Version
SOT404
S
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
A
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