HUF76629D3 Fairchild Semiconductor, HUF76629D3 Datasheet - Page 7

MOSFET N-CH 100V 20A IPAK

HUF76629D3

Manufacturer Part Number
HUF76629D3
Description
MOSFET N-CH 100V 20A IPAK
Manufacturer
Fairchild Semiconductor
Series
UltraFET™r
Datasheet

Specifications of HUF76629D3

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
52 mOhm @ 20A, 10V
Drain To Source Voltage (vdss)
100V
Current - Continuous Drain (id) @ 25° C
20A
Vgs(th) (max) @ Id
3V @ 250µA
Gate Charge (qg) @ Vgs
46nC @ 10V
Input Capacitance (ciss) @ Vds
1285pF @ 25V
Power - Max
110W
Mounting Type
Through Hole
Package / Case
IPak, TO-251, DPak, VPak (3 straight leads + tab)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HUF76629D3
Manufacturer:
FAIRCHILD
Quantity:
12 500
PSPICE Electrical Model
.SUBCKT HUF76629D3 2 1 3 ;
CA 12 8 2.32e-9
CB 15 14 2.32e-9
CIN 6 8 1.22e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 117.89
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 3.11e-9
LSOURCE 3 7 3.72e-9
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 2.97e-2
RGATE 9 20 2.81
RLDRAIN 2 5 10
RLGATE 1 9 54.2
RLSOURCE 3 7 41.6
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 6.5e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*61),3))}
.MODEL DBODYMOD D (IS = 1.15e-12 IKF = 4.3 RS = 7.45e-3 TRS1 = 2.40e-3 TRS2 = 5.15e-7 CJO = 1.14e-9 TT = 5.86e-8 M = 0.52 XTI = 3.65)
.MODEL DBREAKMOD D (RS = 3.78e- 1TRS1 = 1e- 3TRS2 = -1e-6)
.MODEL DPLCAPMOD D (CJO = 1.37e- 9IS = 1e-3 0N = 10 M = 0.94)
.MODEL MMEDMOD NMOS (VTO = 1.84 KP = 2.6 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.81)
.MODEL MSTROMOD NMOS (VTO = 2.13 KP = 42.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.58 KP = 0.07 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 28.1 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 9.88e- 4TC2 = -5.40e-7)
.MODEL RDRAINMOD RES (TC1 = 7.85e-3 TC2 = 1.95e-5)
.MODEL RSLCMOD RES (TC1 = 4.97e-3 TC2 = 5.05e-6)
.MODEL RSOURCEMOD RES (TC1 = 1.5e-3 TC2 = 1e-6)
.MODEL RVTHRESMOD RES (TC1 = -1.85e-3 TC2 = -4.48e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.72e- 3TC2 = 6.00e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5.5 VOFF= -2.2)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.2 VOFF= -5.5)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.1 VOFF= 0.5)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -1.1)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
GATE
1
rev 30 July 1999
RLGATE
LGATE
9
RGATE
CA
12
20
EVTEMP
+
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
6
8
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
MSTRO
14
+
-
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
HUF76629D3, HUF76629D3S Rev. B
7
+
-
18
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
SOURCE
DRAIN
2
3

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