HUF76633P3 Fairchild Semiconductor, HUF76633P3 Datasheet - Page 7

• Manufacturer Part Number: HUF76633P3
• Description: MOSFET N-CH 100V 38A TO-220AB
• Manufacturer: Fairchild Semiconductor
• Series: UltraFET™r

Specifications of HUF76633P3

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 35 mOhm @ 39A, 10V
• Drain To Source Voltage (vdss): 100V
• Current - Continuous Drain (id) @ 25° C: 38A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 67nC @ 10V
• Input Capacitance (ciss) @ Vds: 1820pF @ 25V
• Power - Max: 145W
• Mounting Type: Through Hole
• Package / Case: TO-220-3 (Straight Leads)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PSPICE Electrical Model
.SUBCKT HUF76633 2 1 3 ;
CA 12 8 3.50e-9
CB 15 14 3.50e-9
CIN 6 8 1.70e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 120.7
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.00e-9
LGATE 1 9 5.17e-9
LSOURCE 3 7 2.13e-9
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 2.04e-2
RGATE 9 20 2.15
RLDRAIN 2 5 10
RLGATE 1 9 51.7
RLSOURCE 3 7 21.3
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 4.85e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*79),3.5))}
.MODEL DBODYMOD D (IS = 1.96e-12 RS = 3.87e-3 TRS1 = 9.93e-4 TRS2 = 4.97e-6 CJO = 1.53e-9 TT = 7.41e-8 M = 0.50)
.MODEL DBREAKMOD D (RS = 3.12e- 1TRS1 = 1.07e- 3TRS2 = 0)
.MODEL DPLCAPMOD D (CJO = 1.97e- 9IS = 1e-3 0 M = 0.87)
.MODEL MMEDMOD NMOS (VTO = 1.73 KP = 2.80 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.15)
.MODEL MSTROMOD NMOS (VTO = 2.04 KP = 80 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.50 KP = 0.10 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 21.5 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 9.74e- 4TC2 = -3.71e-7)
.MODEL RDRAINMOD RES (TC1 = 9.71e-3 TC2 = 2.90e-5)
.MODEL RSLCMOD RES (TC1 = 2.17e-3 TC2 = 1.27e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -2.08e-3 TC2 = -6.82e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.52e- 3TC2 = -1.21e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.00 VOFF= -1.50)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.50 VOFF= -6.00)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.50 VOFF= 0.0)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.0 VOFF= -0.50)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
GATE
1
rev 10 September1999
RLGATE
LGATE
9
RGATE
CA
12
20
+
EVTEMP
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
8
6
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
MSTRO
+
-
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
7
+
HUF76633P3, HUF76633S3S Rev. B
-
18
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
SOURCE
DRAIN
2
3