BCM5208KPF Broadcom, BCM5208KPF Datasheet - Page 26

• Manufacturer Part Number: BCM5208KPF
• Manufacturer: Broadcom

Specifications of BCM5208KPF

• Number Of Receivers: 4
• Data Rate: 10/100Mbps
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3.14V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

n BCM5208
MII CONTROL REGISTER
The MII control register bit descriptions are shown in Table 7.
RESET. In order to reset the BCM5208 by software control, a “1” must be written to bit 15 of the Control Register using an
MII write operation. The bit clears itself after the reset process is complete, and need not be cleared using a second MII
write. Writes to other Control Register bits will have no effect until the reset process is completed, which requires
approximately 1 µs. Writing a “0” to this bit has no effect. Since this bit is self-clearing, after a few cycles from a write
operation, it will return a “0” when read.
LOOPBACK. The BCM5208 may be placed into loopback mode by writing a “1” to bit 14 of the Control Register. The
loopback mode may be cleared by writing a “0” to bit 14 of the control register, or by resetting the chip. When this bit is
read, it will return a “1” when the chip is in software-controlled loopback mode, otherwise it will return a “0”.
FORCED SPEED SELECTION. If Auto-Negotiation is enabled, this bit has no effect on the speed selection. However, if
Auto-Negotiation is disabled by software control, the operating speed of the BCM5208 can be forced by writing the
appropriate value to bit 13 of the Control Register. Writing a “1” to this bit forces 100BASE-X operation, while writing a “0”
forces 10BASE-T operation. When this bit is read, it returns the value of the software-controlled forced speed selection
only. In order to read the overall state of forced speed selection, including both hardware and software control, use bit 8 of
the Auxiliary Control Register.
AUTO-NEGOTIATION ENABLE. Auto-Negotiation can be disabled by one of two methods: hardware or software control.
If the ANEN input pin is driven to a logic “0”, Auto-Negotiation is disabled by hardware control. If bit 12 of the Control
Register is written with a value of “0”, Auto-Negotiation is disabled by software control. When Auto-Negotiation is disabled
in this manner, writing a “1” to the same bit of the Control Register or resetting the chip will re-enable Auto-Negotiation.
Writing to this bit has no effect when Auto-Negotiation has been disabled by hardware control. When read, this bit will return
the value most recently written to this location, or “1” if it has not been written since the last chip reset.
POWER DOWN. The BCM5208 does not implement a low power mode.
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BIT
15
14
13
12
11
10
9
8
7
6:0
Note: R/W = Read/Write, RO = Read Only, SC = Self Clear
NAME
Reset
Loopback
Forced Speed Selection
Auto-Negotiation Enable
Power Down
Isolate
Restart Auto-Negotiation
Duplex Mode
Collision Test Enable
Reserved
Table 7: MII Control Register (Address 00d, 00h)
B r o a d c o m C o r p o r a t i o n
R/W
R/W
(S/C)
R/W
R/W
R/W
RO
R/W
R/W
(S/C)
R/W
R/W
RO
DESCRIPTION
1 = PHY reset
0= normal operation
1 = loopback mode
0 = normal operation
1 = 100 Mbps
0 = 10 Mbps
1 = Auto-Negotiation enable
0 = Auto-Negotiation disable
0 = normal operation
1 = electrically isolate PHY from MII
0 = normal operation
1 = restart Auto-Negotiation
0 = normal operation
1 = full-duplex
0 = half-duplex
1 = collision test mode enable
0 = collision test mode disable
Ignore when Read
Document 5208-DS03-R¥¥¥¥¥
November 3, 1999
DEFAULT
0
0
1
1
0
0
0
0
0
0