BCM5208KPF Broadcom, BCM5208KPF Datasheet - Page 28

BCM5208KPF

Manufacturer Part Number
BCM5208KPF
Description
Manufacturer
Broadcom
Datasheet

Specifications of BCM5208KPF

Number Of Receivers
4
Data Rate
10/100Mbps
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3.14V
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Lead Free Status / RoHS Status
Not Compliant

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n BCM5208
100BASE-T4 CAPABILITY. The BCM5208 is not capable of 100BASE-T4 operation, and will return a “0” when bit 15 of
the status register is read.
100BASE-X FULL-DUPLEX CAPABILITY. The BCM5208 is capable of 100BASE-X full-duplex operation, and will return
a “1” when bit 14 of the Status Register is read.
100BASE-X HALF-DUPLEX CAPABILITY. The BCM5208 is capable of 100BASE-X half-duplex operation, and will return
a “1” when bit 13 of the Status Register is read.
10BASE-T FULL-DUPLEX CAPABILITY. The BCM5208 is capable of 10BASE-T full-duplex operation, and will return a
“1” when bit 12 of the Status Register is read.
10BASE-T HALF-DUPLEX CAPABILITY. The BCM5208 is capable of 10BASE-T half-duplex operation, and will return a
“1” when bit 11 of the Status Register is read.
RESERVED BITS Ignore the BCM5208 output when these bits are read.
MF PREAMBLE SUPPRESSION. This bit is the only writable bit in the Status Register. Setting this bit to a “1” allows subsequent
MII management frames to be accepted with or without the standard preamble pattern. When Preamble Suppression is enabled,
only 2 preamble bits are required between successive Management Commands, instead of the normal 32.
AUTO-NEGOTIATION COMPLETE. Bit 5 of the Status Register will return a “1” if the Auto-Negotiation process has been
completed and the contents of registers 4, 5 and 6 are valid.
REMOTE FAULT. The PHY will return a “1” in bit 4 of the Status Register when its link partner has signalled a far-end fault
condition. When a far-end fault occurs, the bit will be latched at “1” and will remain so until the register is read and the
remote fault condition has been cleared; this only applies to the FX mode of operation.
AUTO-NEGOTIATION CAPABILITY. The BCM5208 is capable of performing IEEE Auto-Negotiation, and will return a “1”
when bit 4 of the Status Register is read, regardless of whether or not the Auto-Negotiation function has been disabled.
LINK STATUS. The BCM5208 will return a “1” on bit 2 of the Status Register when the link state machine is in Link Pass,
indicating that a valid link has been established. Otherwise, it will return “0”. When a link failure occurs after the Link Pass
state has been entered, the Link Status bit will be latched at “0” and will remain so until the bit is read. After the bit is read,
it becomes “1” if the Link Pass state has been entered again.
JABBER DETECT. 10BASE-T operation only. The BCM5208 will return a “1” on bit 1 of the Status Register if a jabber
condition has been detected. After the bit is read, or if the chip is reset, it reverts to “0”.
EXTENDED CAPABILITY. The BCM5208 supports extended capability registers, and will return a “1” when bit 0 of the
Status Register is read. Several extended registers have been implemented in the BCM5208, and their bit functions are
defined later in this section.
PHY IDENTIFIER REGISTERS
The physical indentifier registers bit descriptions are shown in Table 9.
Broadcom Corporation has been issued an Organizationally Unique Identifier (OUI) by the IEEE. It is a 24 bit number, 00-
10-18, expressed as hex values. That number, along with the Broadcom Model Number for the BCM5208 part, 13h, and
Broadcom Revision number, 01h, is placed into two MII Registers. The translation from OUI, Model Number and Revision
Number to PHY Identifier Register occurs as follows:
Note: The two most significant bits of the OUI are not represented (OUI[23:22]).
Table 9 shows the result of concatenating these values in order to form the MII Identifier Registers PHYID HIGH and PHYID
LOW.
Page 20
PHYID HIGH [15:0] = OUI[21:6]
PHYID LOW [15:0] = OUI[5:0] + MODEL[5:0] + REV[3:0]
BIT
15:0
15:0
Table 9: PHY Indentifier Registers (Address 02d, 02h, 03d, and 03h)
MII Address 00010
MII Address 00011
NAME
B r o a d c o m C o r p o r a t i o n
R/W
RO
RO
DESCRIPTION
PHYID HIGH
PHYID LOW
Document 5208-DS03-R¥¥¥¥¥
VALUE
0040h
6136h
November 3, 1999

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