BCM5208KPF Broadcom, BCM5208KPF Datasheet - Page 32

• Manufacturer Part Number: BCM5208KPF
• Manufacturer: Broadcom

Specifications of BCM5208KPF

• Number Of Receivers: 4
• Data Rate: 10/100Mbps
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3.14V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Lead Free Status / RoHS Status: Not Compliant

n BCM5208
.
100BASE-X AUXILIARY CONTROL REGISTER
The 100BASE-X auxiliary control register bit descriptions are shown in Table 14.
TRANSMIT DISABLE. The transmitter may be disabled by writing a “1” to bit 13 of MII Register 10h. When the transmitter
is disabled, in the TX mode, the transmitter output (TD±) will be forced into MLT3 zero value, and, in the FX mode, the
transmitter generates the “OFF” state. The transmitter will be enabled at reset, as well as, when a “0” is written to this bit.
CIM DISABLE. The carrier integrity monitor for this port may be disabled by writing a “1” to bit 12 of MII Register 10h. The
CIM function will be enabled when a “0” is written to this bit. The default value of this bit after reset will be determined by
the CIM mode select pin, if RPTR=1. If RPTR=0 during reset, the CIM function is disabled by default.
BYPASS 4B5B ENCODER/DECODER. The 4B5B encoder and decoder may be bypassed by writing a “1” to bit 10 of MII
Register 10h. The transmitter will send 5B codes from the TXER and TXD[3:0] pins directly to the scrambler. TXEN will be
ignored and frame encapsulation (insertion of J/K and T/R codes) will not be performed. The receiver will place de-scrambled
and aligned 5B codes onto the RXER and RXD[3:0] pins. CRS will still be asserted when a valid frame is received.
BYPASS SCRAMBLER/DESCRAMBLER. The stream cipher function may be disabled by writing a “1” to bit 9 of MII
register 10h. The stream cipher function may be re-enabled by writing a “0” to this bit.
BYPASS NRZI ENCODER/DECODER. The NRZI encoder and decoder may be bypassed by writing a “1” to bit 8 of the
MII Register 10h, causing 3-level NRZ data to be transmitted and received on the cable. Normal operation (3-level NRZI
encoding and decoding) may be re-enabled by writing a “0” to this bit.
BYPASS RECEIVE SYMBOL ALIGNMENT. Receive symbol alignment may be bypassed by writing a “1” to bit 7 of MII
Register 10h. When used in conjunction with the bypass 4B5B encoder/decoder bit, unaligned 5B codes will be placed
directly on the RXER and RXD[3:0] pins.
BASELINE WANDER CORRECTION DISABLE. The baseline wander correction circuit may be disabled by writing a “1”
to bit 6 of MII register 10h. The BCM5208 will correct for baseline wander on the receive data signal when this bit is cleared.
FEF Enable. Controls the Far End Fault mechanism associated with 100BASE-FX operation. A “1” enables the FEF
function and a “0” disables it.
Page 24
BIT
15:14
13
12
11
10
9
8
7
6
5
4:0
NAME
Reserved
Transmit Disable
CIM Disable
Reserved
Bypass 4B5B Encoder/
Decoder
Bypass Scrambler/
Descrambler
Bypass NRZI Encoder/
Decoder
Bypass Receive Symbol
Alignment
Baseline Wander Correction
Disable
FEF Enable
Reserved
Table 14: 100BASE-X Auxiliary Control Register (Address 16d, 10h)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
B r o a d c o m C o r p o r a t i o n
DESCRIPTION
1 = transmitter disabled in PHY
0 = normal operation
1 = disable Carrier Integrity Monitor function
0 = enable Carrier Integrity Monitor function
1 = transmit and receive 5B codes over MII pins
0 = normal MII interface
1 = scrambler and descrambler disabled
0 = scrambler and descrambler enabled
1 = NRZI encoder and decoder is disabled
0 = NRZI encoder and decoder is enabled
1 = 5B receive symbols not aligned
0 = receive symbols aligned to 5B boundaries
1 = baseline wander correction disabled
0 = baseline wander correction enabled
1 = Far End Fault enabled
0 = Far End Fault disabled
Write as 0; Ignore on read
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DEFAULT
0
1 if RPTR = 0
CIM PIN if RPTR = 1
0
0
0
0
0
0
November 3, 1999