AM79C874VC AMD (ADVANCED MICRO DEVICES), AM79C874VC Datasheet - Page 29

• Manufacturer Part Number: AM79C874VC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C874VC

• Lead Free Status / RoHS Status: Not Compliant

square of the ratio (1.25
capacitance on the media side is roughly one and a half
times the capacitance on the board. Extra care in the
layout to control capacitance on the board is required.
Power Down
Most of the NetPHY-1LP device can be disabled via the
Power Down bit in MII Register 0, bit 11. Setting this bit
will power down the entire device with the exception of
the MDIO/MDC management circuitry.
Unplugged
The TX output driver limits the drive capability if the re-
ceiver does not detect a link partner within 4 seconds.
This prevents “wasted” power. If the receiver detects
the absence of a link partner, the transmitter is limited
22235K
2
= 1.56). Thus, the reflected
D A T A
S H E E T
Am79C874
to transmitting normal link pulses. Any energy detected
by the receiver enables full transmit and receive capa-
bilities. The power savings is most notable when the
port is unconnected. Typical power drops to one third
of normal.
Idle Wire
This can be achieved by writing to MII Register 16, bit
0. During this mode, if there is no data other than idles
coming in, the receive clock (RX_CLK) will turn off to
save power for the attached controller. RX_CLK will re-
sume operation one clock period prior to the assertion
of RX_DV. The receive clock will again shut off 64 clock
cycles after RX_DV gets deasserted. Typical power
savings of 100 mW can be realized in some MACs.
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