PIC32MX575F256LT-80I/PT Microchip Technology, PIC32MX575F256LT-80I/PT Datasheet - Page 12

• Manufacturer Part Number: PIC32MX575F256LT-80I/PT
• Description: 256KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 100 TQFP 12x12x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX575F256LT-80I/PT

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC32MX
6.3
Format:
Purpose:
Description (in sequence):
FIGURE 6-5:
FIGURE 6-6:
DS61145G-page 12
oData = XferData (iData)
To clock data to and from the register selected by the
command.
1.
2.
3.
4.
The TMS Header is clocked into the device to
select the Shift DR state.
The data is clocked in/out of the device on
TDI/TDO while holding signal TMS low.
The last MSb of the data is clocked in/out
while setting TMS high.
The TMS Footer is clocked in on TMS to return
the TAP controller to the Run/Test Idle state.
TMS
TCK
TDO
TDI
XferData Pseudo Operation
PGC
PGD
TDI = iLSb
TDI = 0
TDI = 0
‘1’
Data (31’h12) + TMS = 0
TMS Header = 100
XferData 4-WIRE
XferData 2-WIRE (4-PHASE)
TMS = 0
TMS = 1
TMS = 1
‘0’
TDO = oLSb+1
TDO =
TDO =
TMS Footer =
...
‘0’
X
X
TMS Header =
TDI = 0
oLSb
10
iLSb
TDI = 0
Data (32’h12)
TDI = iMSb
Data (MSb) + TMS Footer = 1
TMS = 0
TMS = 0
100
TMS = 1
Restrictions:
Example:
None.
oData = XferData (32’h12)
Data (MSb)
TDO =
+ TMS = 1
TDO =
oMSb
iMSb
‘1’
X
X
TDO =
TDI = 0
X
‘1’
TMS Footer = 10
© 2010 Microchip Technology Inc.
TMS = 0
‘0’
TDO = oLSb