PIC32MX575F256LT-80I/PT Microchip Technology, PIC32MX575F256LT-80I/PT Datasheet - Page 62

256KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 100 TQFP 12x12x1mm T/R

PIC32MX575F256LT-80I/PT

Manufacturer Part Number
PIC32MX575F256LT-80I/PT
Description
256KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 100 TQFP 12x12x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX575F256LT-80I/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX575F256LT-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX
APPENDIX C:
Revision E (July 2009)
This version of the document contains the following
additions and updates:
• Minor changes to style and formatting have been
• Added the following devices to Table 5-1:
• Updated MCLR pulse line to show active-high
• Updated Step 7 of Table 11-1 to clarify repeat of
• The following instructions in Table 13-1 were
• Added the following devices to Table 17-1:
DS61145G-page 62
incorporated throughout the document
- PIC32MX565F256H
- PIC32MX575F512H
- PIC32MX675F512H
- PIC32MX795F512H
- PIC32MX575F512L
- PIC32MX675F512L
- PIC32MX795F512L
(P20) in Figure 7-1
the last instruction in the step
updated:
- Seventh, ninth and eleventh instructions in
- All instructions in Step 2
- First instruction in Step 3
- Third instruction in Step 4
- PIC32MX565F256H
- PIC32MX575F512H
- PIC32MX575F512L
- PIC32MX675F512H
- PIC32MX675F512L
- PIC32MX795F512H
- PIC32MX795F512L
Step 1
REVISION HISTORY
• Updated address values in Table 17-2
• Added the following devices to Table 17-5:
• Added Notes 1-3 and the following bits to the
• Updated the DEVID Summary (see Table 18-2)
• Updated ICESEL bit description and added the
• Updated DEVID: Device and Revision ID register
• Added Device IDs and Revision table (Table 18-5)
• Added MCLR High Time (parameter P20) to
• Added Appendix B: “Hex File Format” and
- PIC32MX565F256H
- PIC32MX575F512H
- PIC32MX675F512H
- PIC32MX795F512H
- PIC32MX575F512L
- PIC32MX675F512L
- PIC32MX795F512L
DEVCFG - Device Configuration Word Summary
and the DEVCFG3: Device Configuration Word 3
(see Table 18-1 and Register 18-4):
- FVBUSIO
- FUSBIDIO
- FCANIO
- FETHIO
- FMIIEN
- FPBDIV<1:0>
- FJTAGEN
FJTAGEN bit in DEVCFG0: Device Configuration
Word 0 (see Register 16-1)
(see Register 18-5)
Table 20-1
Appendix C: “Revision History”
© 2010 Microchip Technology Inc.

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