PIC32MX575F256LT-80I/PT Microchip Technology, PIC32MX575F256LT-80I/PT Datasheet - Page 24

256KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 100 TQFP 12x12x1mm T/R

PIC32MX575F256LT-80I/PT

Manufacturer Part Number
PIC32MX575F256LT-80I/PT
Description
256KB Flash, 64KB RAM, 80 MHz, USB, 1xCAN, 8 DMA 100 TQFP 12x12x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX575F256LT-80I/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX575F256LT-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX
TABLE 13-1:
DS61145G-page 24
Opcode
Step 7: Wait at least 500 ns after seeing a ‘0’ in
00000000
00000000
00000000
00000000
Step 8: Clear NVMCON.WREN bit.
ac870004
Step 9: Check the NVMCON.WRERR bit to ensure
8c880000
30082000
1500<ERR_PROC>
00000000
NVMCON<15> before writing to any NVM
registers. This requires inserting NOP in the
execution.
Example: The following example assumes
that the core is executing at 8 MHz; therefore,
four NOP instructions equate to 500 ns.
that the program sequence completed suc-
cessfully. If an error occurs, jump to the
error-processing routine.
Instruction
nop
nop
nop
nop
sw
lw
andi t0,zero,0x2000
bne t0, $0, <err_proc_offset>
nop
INITIATE FLASH ROW WRITE
OPCODES (CONTINUED)
a3,4(a0)
t0,0(a0)
© 2010 Microchip Technology Inc.

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