LSI53CF92A LSI, LSI53CF92A Datasheet - Page 14

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LSI53CF92A

Manufacturer Part Number
LSI53CF92A
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53CF92A

Lead Free Status / RoHS Status
Not Compliant

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xiv
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
6.18
6.19
6.20
6.21
6.22
6.23
A.1
Contents
Copyright © 1995–2002 by LSI Logic Corporation. All rights reserved.
Bidirectional Pins
TolerANT Active Negation Technology Electrical
Characteristics
Pin Terminations
Clock Timing (FASTCLK Bit Cleared)
Clock Timing (FASTCLK Bit Set)
Reset Timing
Interrupt Timing
Register Interface, Nonmultiplexed PAD Bus
Register Interface, Multiplexed PAD Bus
DMA Interface (Nonmultiplexed Mode Only)
DMA Interface (Multiplexed Mode Only)
Burst Mode DMA Interface (Multiplexed Mode)
Burst Mode DMA Interface (Nonmultiplexed Mode)
Initiator Asynchronous Send Timings
Initiator Asynchronous Receive Timings
Target Asynchronous Send Timings
Target Asynchronous Receive Timings
SCSI-1 SE Transfers (5 Mbytes/s)
Fast SCSI-2 SE Transfers (10 Mbytes/s)
Register Map
6-10
6-12
6-14
6-16
6-18
6-20
6-22
6-23
6-24
6-25
6-26
6-28
6-28
A-1
6-3
6-4
6-7
6-8
6-8
6-9

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